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LMX2512LQ0967 PDF预览

LMX2512LQ0967

更新时间： 2024-11-20 22:12:11
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
18页 182K
描述
PLLatinum⑩ Frequency Synthesizer System with Integrated VCO

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中文翻译

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LMX2512LQ0967 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：5 X 5 MM, 0.75 MM HEIGHT, LLP-28Reach Compliance Code：not_compliant
HTS代码：8542.39.00.01风险等级：4.21
模拟集成电路 - 其他类型：PLL FREQUENCY SYNTHESIZERJESD-30 代码：S-XQCC-N28
JESD-609代码：e0长度：5 mm
湿度敏感等级：3功能数量：1
端子数量：28最高工作温度：85 °C
最低工作温度：-30 °C封装主体材料：UNSPECIFIED
封装代码：VQCCN封装等效代码：LCC28,.2SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, VERY THIN PROFILE
峰值回流温度（摄氏度）：260电源：2.8 V
认证状态：Not Qualified座面最大高度：0.8 mm
子类别：PLL or Frequency Synthesis Circuits最大供电电流 (Isup)：21 mA
最大供电电压 (Vsup)：3.3 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：2.8 V表面贴装：YES
温度等级：OTHER端子面层：Tin/Lead (Sn/Pb)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：40
宽度：5 mmBase Number Matches：1

LMX2512LQ0967 数据手册

 浏览型号LMX2512LQ0967的Datasheet PDF文件第2页浏览型号LMX2512LQ0967的Datasheet PDF文件第3页浏览型号LMX2512LQ0967的Datasheet PDF文件第4页浏览型号LMX2512LQ0967的Datasheet PDF文件第5页浏览型号LMX2512LQ0967的Datasheet PDF文件第6页浏览型号LMX2512LQ0967的Datasheet PDF文件第7页 
June 2003  
LMX2502/LMX2512  
™
PLLatinum Frequency Synthesizer System with  
Integrated VCO  
General Description  
Features  
n Small Size  
LMX2502 and LMX2512 are highly integrated, high perfor-  
mance, low power frequency synthesizer systems optimized  
for Korean PCS and Korean Cellular CDMA (1xRTT, IS-95)  
mobile handsets. Using a proprietary digital phase locked  
loop technique, LMX2502 and LMX2512 generate very  
stable, low noise local oscillator signals for up and down  
conversion in wireless communications devices.  
5.0 mm X 5.0 mm X 0.75 mm 28-Pin LLP Package  
n RF Synthesizer System  
Integrated RF VCO  
Integrated Loop Filter  
Low Spurious, Low Phase Noise Fractional-N RF PLL  
Based on 11-Bit Delta Sigma Modulator  
10 kHz Frequency Resolution  
n IF Synthesizer System  
Integer-N IF PLL  
Programmable Charge Pump Current Levels  
Programmable Frequency  
n Supports Various Reference Frequencies  
19.20/19.68 MHz  
n Fast Lock Time: 500 µs  
n Low Current Consumption  
17 mA at 2.8 V  
n 2.7 V to 3.3 V Operation  
LMX2502 and LMX2512 include a voltage controlled oscil-  
lator (VCO), a loop filter, and a fractional-N RF PLL based on  
a delta sigma modulator. In concert these blocks form a  
closed loop RF synthesizer system. LMX2502 supports the  
Korean PCS band and LMX2512 supports the Korean Cel-  
lular band.  
LMX2502 and LMX2512 include an Integer-N IF PLL also.  
For more flexible loop filter designs, the IF PLL includes a  
4-level programmable charge pump. Together with an exter-  
nal VCO and loop filter, LMX2502 and LMX2512 make a  
complete closed loop IF synthesizer system.  
Serial data is transferred to the device via a three-wire  
MICROWIRE interface (DATA, LE, CLK).  
n Digital Filtered Lock Detect Output  
n Hardware and Software Power Down Control  
Operating supply voltage ranges from 2.7 V to 3.3 V.  
LMX2502 and LMX2512 feature low current consumption:  
17 mA at 2.8 V.  
Applications  
n Korean PCS CDMA Systems  
n Korean Cellular CDMA Systems  
LMX2502 and LMX2512 are available in a 28-pin leadless  
leadframe package (LLP).  
Functional Block Diagram  
20068001  
™
PLLatinum is a trademark of National Semiconductor Corporation.  
© 2003 National Semiconductor Corporation  
DS200680  
www.national.com  
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