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LMX2505LQ1321 PDF预览

LMX2505LQ1321

更新时间: 2024-02-08 08:53:20
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
16页 229K
描述
PLLatinu Dual Frequency Synthesizer System with Integrated VCOs

LMX2505LQ1321 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84Is Samacsys:N
模拟集成电路 - 其他类型:PLL FREQUENCY SYNTHESIZERBase Number Matches:1

LMX2505LQ1321 数据手册

 浏览型号LMX2505LQ1321的Datasheet PDF文件第2页浏览型号LMX2505LQ1321的Datasheet PDF文件第3页浏览型号LMX2505LQ1321的Datasheet PDF文件第4页浏览型号LMX2505LQ1321的Datasheet PDF文件第5页浏览型号LMX2505LQ1321的Datasheet PDF文件第6页浏览型号LMX2505LQ1321的Datasheet PDF文件第7页 
April 2004  
LMX2505  
PLLatinum Dual Frequency Synthesizer System  
with Integrated VCOs  
General Description  
Features  
n Small Size  
LMX2505 is a highly integrated, high performance, low  
power frequency synthesizer system optimized for dual-  
band Japan PDC mobile handsets. Using a proprietary digi-  
tal phase locked loop technique, LMX2505 generates very  
stable, low noise local oscillator signals for up and down  
conversion in wireless communications devices.  
5.0 mm X 5.0 mm X 0.75 mm 28-Pin LLP Package  
n RF Synthesizer System  
Two Integrated VCOs  
Integrated Loop Filter  
Low Spurious, Low Phase Noise Fractional-N RF PLL  
Based on 10-Bit Delta Sigma Modulator  
Frequency Resolution Down to 20 kHz  
n Supports Various Reference Frequencies  
12.6/14.4/25.2/26.0 MHz  
n Fast Lock Time: 300 µs  
n Low Current Consumption  
LMX2505 includes dual voltage controlled oscillators (VCOs)  
for the upper and lower Japan PDC frequency bands, a loop  
filter, and a fractional-N RF PLL based on a delta sigma  
modulator. In concert these blocks form a closed loop RF  
synthesizer system. The RF synthesizer system supports  
two frequency bands: PDC1500 and PDC800.  
10 mA at 2.8 V in PDC800 Mode  
n 2.5 V to 3.3 V Operation  
Serial data is transferred to the device via a three-wire  
MICROWIRE interface (DATA, LE, CLK).  
n Digital Filtered Lock Detect Output  
n Hardware and Software Power Down Control  
Operating supply voltage ranges from 2.5 V to 3.3 V.  
LMX2505 features low current consumption: 10 mA at 2.8 V  
when operating in the PDC800 mode.  
LMX2505 is available in a 28-pin leadless leadframe pack-  
age (LLP).  
Applications  
n Japan PDC Systems at 800 MHz and 1500 MHz  
Frequency Bands.  
Functional Block Diagram  
20067107  
FastLock is a trademark of National Semiconductor Corporation.  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
PLLatinum is a trademark of National Semiconductor Corporation.  
© 2004 National Semiconductor Corporation  
DS200671  
www.national.com  

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