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LMX2485 PDF预览

LMX2485

更新时间: 2024-01-29 08:13:32
品牌 Logo 应用领域
美国国家半导体 - NSC 半导体
页数 文件大小 规格书
37页 881K
描述
50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL

LMX2485 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVQCCN, LCC24,.16SQ,20
Reach Compliance Code:compliantECCN代码:5A991.G
HTS代码:8542.39.00.01风险等级:1.58
模拟集成电路 - 其他类型:PLL FREQUENCY SYNTHESIZERJESD-30 代码:S-PQCC-N24
JESD-609代码:e3长度:4 mm
湿度敏感等级:3功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C最大输出频率:3000 GHz
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装等效代码:LCC24,.16SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3 V认证状态:Not Qualified
座面最大高度:0.75 mm子类别:PLL or Frequency Synthesis Circuits
最大供电电流 (Isup):5 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.5 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4 mmBase Number Matches:1

LMX2485 数据手册

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October 2006  
LMX2485/LMX2485E  
50 MHz - 3.0 GHz High Performance Delta-Sigma Low  
Power Dual PLLatinum Frequency Synthesizers with  
800 MHz Integer PLL  
n Direct digital modulation applications  
General Description  
n Satellite and cable TV tuners  
The LMX2485 is a low power, high performance delta-sigma  
n WLAN Standards  
fractional-N PLL with an auxiliary integer-N PLL. The device  
is fabricated using National Semiconductor’s advanced pro-  
cess.  
Features  
With delta-sigma architecture, fractional spurs at lower offset  
frequencies are pushed to higher frequencies outside the  
loop bandwidth. The ability to push close in spur and phase  
noise energy to higher frequencies is a direct function of the  
modulator order. Unlike analog compensation, the digital  
feedback technique used in the LMX2485 is highly resistant  
to changes in temperature and variations in wafer process-  
ing. The LMX2485 delta-sigma modulator is programmable  
up to fourth order, which allows the designer to select the  
optimum modulator order to fit the phase noise, spur, and  
lock time requirements of the system.  
Quadruple Modulus Prescalers for Lower Divide Ratios  
n RF PLL: 8/9/12/13 or 16/17/20/21  
n IF PLL: 8/9 or 16/17  
Advanced Delta Sigma Fractional Compensation  
n 12 bit or 22 bit selectable fractional modulus  
n Up to 4th order programmable delta-sigma modulator  
Features for Improved Lock Times and Programming  
n Fastlock / Cycle slip reduction  
n Integrated time-out counter  
n Single word write to change frequencies with Fastlock  
Serial data for programming the LMX2485 is transferred via  
a three line high speed (20 MHz) MICROWIRE interface.  
The LMX2485 offers fine frequency resolution, low spurs,  
fast programming speed, and a single word write to change  
the frequency. This makes it ideal for direct digital modula-  
tion applications, where the N counter is directly modulated  
with information. The LMX2485 is available in a 24 lead  
4.0 X 4.0 X 0.8 mm LLP package.  
Wide Operating Range  
n LMX2485 RF PLL: 500 MHz to 3.0 GHz  
n LMX2485E RF PLL: 50 MHz to 3.0 GHz  
Useful Features  
n Digital lock detect output  
n Hardware and software power-down control  
n On-chip crystal reference frequency doubler.  
n RF phase comparison frequency up to 50 MHz  
n 2.5 to 3.6 volt operation with ICC = 5.0 mA at 3.0 V  
Applications  
n Cellular phones and base stations  
CDMA, WCDMA, GSM/GPRS, TDMA, EDGE, PDC  
Functional Block Diagram  
20087701  
PLLatinum is a trademark of National Semiconductor Corporation.  
© 2006 National Semiconductor Corporation  
DS200877  
www.national.com  

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