5秒后页面跳转
LMUN5332DW1T1G_15 PDF预览

LMUN5332DW1T1G_15

更新时间: 2024-09-17 00:55:19
品牌 Logo 应用领域
乐山 - LRC /
页数 文件大小 规格书
29页 268K
描述
Dual Bias Resistor Transistors

LMUN5332DW1T1G_15 数据手册

 浏览型号LMUN5332DW1T1G_15的Datasheet PDF文件第2页浏览型号LMUN5332DW1T1G_15的Datasheet PDF文件第3页浏览型号LMUN5332DW1T1G_15的Datasheet PDF文件第4页浏览型号LMUN5332DW1T1G_15的Datasheet PDF文件第5页浏览型号LMUN5332DW1T1G_15的Datasheet PDF文件第6页浏览型号LMUN5332DW1T1G_15的Datasheet PDF文件第7页 
LESHAN RADIO COMPANY, LTD.  
Dual Bias Resistor Transistors  
NPN and PNP Silicon Surface Mount  
Transistors with Monolithic Bias  
Resistor Network  
LMUN5311DW1T1G  
Series  
6
5
4
The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network  
consisting of two resistors; a series base resistor and a base–emitter resistor. These digital tran-  
sistors are designed to replace a single device and its external resistor bias network. The BRT  
eliminates these individual components by integrating them into a single device. In the  
LMUN5311DW1T1G series, two complementary BRT devices are housed in the SOT–363 package  
which is ideal for low power surface mount applications where board space is at a premium.  
• Simplifies Circuit Design  
1
2
3
SOT-363/SC-88  
• Reduces Board Space  
• Reduces Component Count  
• We declare that the material of product compliance with RoHS requirements.  
MAXIMUM RATINGS (T A = 25°C unless otherwise noted, common for Q 1  
6
5
4
and Q 2 , – minus sign for Q 1 (PNP) omitted)  
R1  
R2  
Rating  
Symbol Value  
Unit  
Vdc  
Q2  
Collector-Base Voltage  
Collector-Emitter Voltage  
Collector Current  
V CBO  
V CEO  
I C  
50  
50  
R2  
Q1  
Vdc  
R1  
100  
mAdc  
1
2
3
THERMAL CHARACTERISTICS  
Characteristic  
MARKING DIAGRAM  
(One Junction Heated)  
Total Device Dissipation  
T A = 25°C  
Symbol  
Max  
Unit  
6
5
4
P D  
187 (Note 1.)  
256 (Note 2.)  
1.5 (Note 1.)  
2.0 (Note 2.)  
670 (Note 1.)  
490 (Note 2.)  
mW  
XX  
Derate above 25°C  
mW/°C  
°C/W  
1
2
3
Thermal Resistance –  
Junction-to-Ambient  
R θJA  
xx = Device Marking  
= (See Page 2)  
Characteristic  
(Both Junctions Heated)  
Symbol  
Max  
Unit  
DEVICE MARKING  
INFORMATION  
See specific marking information in  
the device marking table on page 2 of  
this data sheet.  
Total Device Dissipation  
T A = 25°C  
P D  
250 (Note 1.)  
385 (Note 2.)  
2.0 (Note 1.)  
3.0 (Note 2.)  
493 (Note 1.)  
325 (Note 2.)  
188 (Note 1.)  
208 (Note 2.)  
mW  
Derate above 25°C  
mW/°C  
°C/W  
Thermal Resistance –  
Junction-to-Ambient  
Thermal Resistance –  
Junction-to-Lead  
R θJA  
R θJL  
°C/W  
Junction and Storage  
Temperature  
T J , T stg  
–55 to +150  
°C  
1. FR–4 @ Minimum Pad  
2. FR–4 @ 1.0 x 1.0 inch Pad  
1/29  

与LMUN5332DW1T1G_15相关器件

型号 品牌 获取价格 描述 数据表
LMUN5333DW1T1 LRC

获取价格

Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith
LMUN5333DW1T1G LRC

获取价格

Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith
LMUN5333DW1T1G_15 LRC

获取价格

Dual Bias Resistor Transistors
LMUN5334DW1T1 LRC

获取价格

Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith
LMUN5334DW1T1G LRC

获取价格

Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith
LMUN5334DW1T1G_15 LRC

获取价格

Dual Bias Resistor Transistors
LMUN5335DW1T1 LRC

获取价格

Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith
LMUN5335DW1T1G LRC

获取价格

Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith
LMUPY201209T-101Y-N LEIDITECH

获取价格

This specification applies to MULTILAYER FERRITE CHIP BEADS
LMUPY201209T-121Y-N LEIDITECH

获取价格

This specification applies to MULTILAYER FERRITE CHIP BEADS