Datasheet > LMUN5311DW1T1

LMUN5311DW1T1

更新时间： 2024-11-09 11:37:31

品牌	Logo	应用领域
乐山 - LRC		晶体晶体管
页数	文件大小	规格书
29页	424K
描述
Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network

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LMUN5311DW1T1 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.8
最大集电极电流 (IC)：	0.1 A	最小直流电流增益 (hFE)：	35
元件数量：	2	极性/信道类型：	NPN/PNP
最大功率耗散 (Abs)：	0.385 W	子类别：	BIP General Purpose Small Signal
表面贴装：	YES	晶体管元件材料：	SILICON
Base Number Matches：	1

LMUN5311DW1T1 数据手册

LESHAN RADIO COMPANY, LTD.

Dual Bias Resistor Transistors

NPN and PNP Silicon Surface Mount

Transistors with Monolithic Bias

Resistor Network

LMUN5311DW1T1

Series

The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network

consisting of two resistors; a series base resistor and a base–emitter resistor. These digital tran-

sistors are designed to replace a single device and its external resistor bias network. The BRT

eliminates these individual components by integrating them into a single device. In the

LMUN5311DW1T1 series, two complementary BRT devices are housed in the SOT–363 package

which is ideal for low power surface mount applications where board space is at a premium.

• Simplifies Circuit Design

SOT-363/SC-88

• Reduces Board Space

• Reduces Component Count

• Pb-Free Package is available

MAXIMUM RATINGS (T A = 25°C unless otherwise noted, common for Q 1

and Q 2 , – minus sign for Q 1 (PNP) omitted)

R₁

R₂

Rating

Symbol Value

Unit

Vdc

Q₂

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

V _CBO

V _CEO

I _C

R₂

Q₁

Vdc

R₁

100

mAdc

THERMAL CHARACTERISTICS

Characteristic

MARKING DIAGRAM

(One Junction Heated)

Total Device Dissipation

T _A= 25°C

Symbol

Max

Unit

P _D

187 (Note 1.)

256 (Note 2.)

1.5 (Note 1.)

2.0 (Note 2.)

670 (Note 1.)

490 (Note 2.)

Derate above 25°C

mW/°C

°C/W

Thermal Resistance –

Junction-to-Ambient

R _θJA

xx = Device Marking

= (See Page 2)

Characteristic

(Both Junctions Heated)

Symbol

Max

Unit

DEVICE MARKING

INFORMATION

See specific marking information in

the device marking table on page 2 of

this data sheet.

Total Device Dissipation

T _A= 25°C

P _D

250 (Note 1.)

385 (Note 2.)

2.0 (Note 1.)

3.0 (Note 2.)

Derate above 25°C

mW/°C

°C/W

Thermal Resistance –

Junction-to-Ambient

Thermal Resistance –

Junction-to-Lead

R _θJA

R _θJL

493 (Note 1.)

325 (Note 2.)

188 (Note 1.)

208 (Note 2.)

°C/W

Junction and Storage

Temperature

T _J, T _stg

–55 to +150

°C

1. FR–4 @ Minimum Pad

2. FR–4 @ 1.0 x 1.0 inch Pad

LMUN5311DW–1/29

12 3 4 5 6 7...29

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与LMUN5311DW1T1相关器件

型号	品牌	获取价格	描述	数据表
LMUN5311DW1T1G	LRC	获取价格	Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith
LMUN5312DW1T1	LRC	获取价格	Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith
LMUN5312DW1T1G	LRC	获取价格	Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith
LMUN5313DW1T1	LRC	获取价格	Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith
LMUN5313DW1T1G	LRC	获取价格	Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith
LMUN5313DW1T1G_15	LRC	获取价格	Dual Bias Resistor Transistors
LMUN5314DW1T1	LRC	获取价格	Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith
LMUN5314DW1T1G	LRC	获取价格	Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith
LMUN5314DW1T1G_15	LRC	获取价格	Dual Bias Resistor Transistors
LMUN5315DW1T1	LRC	获取价格	Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolith

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