Datasheet > LMU216JC25

LMU216JC25

更新时间： 2024-09-23 22:20:39

品牌	Logo	应用领域
逻辑 - LOGIC		/
页数	文件大小	规格书
7页	190K
描述
16 x 16-bit Parallel Multiplier

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

LMU216JC25 数据手册

LMU16/216

DEVICES INCORPORATED

16 x 16-bit Parallel Multiplier

LMU16/216

16 x 16-bit Parallel Multiplier

DEVICES INCORPORATED

FEATURES

DESCRIPTION

The LMU16 and LMU216 are high- RND is loaded on the rising edge of

❑ 20 ns Worst-Case Multiply Time

❑ Low Power CMOS Technology

❑ Replaces Fairchild MPY016/TMC216,

Cypress CY7C516, IDT 7216L, and

AMD Am29516

speed, low power 16-bit parallel

multipliers. The LMU16 and

the logical OR of CLK A and CLK B.

RND, when HIGH, adds ‘1’ to the

LMU216 are functionally identical; most significant bit position of the

they differ only in packaging.

least significant half of the product.

Subsequent truncation of the 16 least

significant bits produces a result

correctly rounded to 16-bit precision.

❑ Two’s Complement, Unsigned, or

The LMU16 and LMU216 produce

the 32-bit product of two 16-bit

numbers. Data present at the A

Mixed Operands

❑ Three-State Outputs

❑ 68-pin PLCC, J-Lead

inputs, along with the TCA control At the output, the Right Shift control

bit, is loaded into the A register on (RS) selects either of two output

the rising edge of CLK A. B data

and the TCB control bit are

similarly loaded by CLK B. The

TCA and TCB controls specify the

A and B operands as two’s

complement when HIGH, or

unsigned magnitude when LOW.

formats. RS LOW produces a 31-bit

product with a copy of the sign bit

inserted in the MSB postion of the

least significant half. RS HIGH gives a

full 32-bit product. Two 16-bit output

registers are provided to hold the

most and least significant halves of the

result (MSP and LSP) as defined by

RS. These registers are loaded on the

rising edge of CLK M and CLK L

respectively. For asynchronous

output, these registers may be made

transparent by setting the feed

LMU16/216 BLOCK DIAGRAM

15-0

TCA

15-0

TCB

through control (FT) HIGH.

A REGISTER

The two halves of the product may be

routed to a single 16-bit three-state

output port (MSP) via a multiplexer.

MSPSEL LOW causes the MSP

outputs to be driven by the most

significant half of the result. MSPSEL

HIGH routes the least significant half

of the result to the MSP outputs. In

addition, the LSP is available via the B

port through a separate three-state

buffer.

CLK A

CLK B

B REGISTER

RND

FORMAT ADJUST

The output multiplexer control

MSPSEL uses a pin which is a supply

ground in the Fairchild MPY016H/

TMC216H. When this control is LOW

(GND), the function is that of the

MPY016H/TMC216H, thus allowing

full compatibility.

CLK M

CLK L

RESULT

MSPSEL

OEM

OEL

31-16

Multipliers

08/16/2000–LDS.16/216-N

12 3 4 5 6 7

中文翻译

下载PDF

与LMU216JC25相关器件

型号	品牌	获取价格	描述	数据表
LMU216JC35	LOGIC	获取价格	Multiplier, 16-Bit, CMOS, PQCC68, 0.990 X 0.990 INCH, PLASTIC, MO-047-AE, LCC-68
LMU216JC45	LOGIC	获取价格	Multiplier, 16-Bit, CMOS, PQCC68, 0.990 X 0.990 INCH, PLASTIC, MO-047-AE, LCC-68
LMU216JC55	ETC	获取价格	Multiplier
LMU216JC65	LOGIC	获取价格	Multiplier, 16-Bit, CMOS, PQCC68, 0.990 X 0.990 INCH, PLASTIC, MO-047-AE, LCC-68
LMU216KC45	ETC	获取价格	Multiplier
LMU216KC55	LOGIC	获取价格	Multiplier, 16-Bit, CMOS, CQCC68, 0.950 X 0.950 INCH, CERAMIC, LCC-68
LMU216KC65	ETC	获取价格	Multiplier
LMU216KM55	LOGIC	获取价格	Multiplier, 16-Bit, CMOS, CQCC68, 0.950 X 0.950 INCH, CERAMIC, LCC-68
LMU216KM65	ETC	获取价格	Multiplier
LMU216KM75	ETC	获取价格	Multiplier

与LMU216JC25相关文章

SK海力士量产12层HBM3E，容量高达36GB
2024-09-27

4
意法半导体传感器驱动Sphere，开启沉浸式电影新时代
2024-09-27

8
摩尔斯微电子在美国约书亚树国家公园测试 Wi-Fi HaLow
2024-09-18

79
贸泽上架Tallysman TW5386智能GNSS天线
2024-09-18

71

产品中心

服务支持

精选活动

关于我们

帮助中心

LMU216JC25

LMU216JC25 数据手册

与LMU216JC25相关器件

与LMU216JC25相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

LMU216JC25

LMU216JC25 数据手册

与LMU216JC25相关器件

与LMU216JC25相关文章

您还可以找

您在本页遇到什么问题？