July 2007
LMP8100
Programmable Gain Amplifier
General Description
Features
The LMP8100 programmable gain amplifier features an ad-
justable gain from 1 to 16 V/V in 1 V/V increments. At the core
of the LMP8100 is a precision, 33 MHz, CMOS input, rail-to-
rail input/output operational amplifier with a typical open-loop
gain of 110 dB. Amplifier closed-loop gain is set by an array
of precision thin-film resistors. Amplifier control modes are
programmed via a serial port that allows devices to be cas-
caded so that an array of LMP8100 amplifiers can be pro-
grammed by a single serial data stream. The control mode
registers are double buffered to insure glitch-free transitions
between programmed settings. The LMP8100 is part of the
LMP® precision amplifier family and is ideal for a variety of
applications.
Typical Values, TA = 25°C
Gain error (over temperature range)
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LMP8100A
LMP8100
Gain range
0.03%
0.075%
1 to 16 V/V in 1 V/V steps
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Programmable frequency compensation
Input zero calibration switch
Input offset voltage (max, LMP8100A)
Input bias current
Input noise voltage
Unity gain bandwidth
Slew rate
Output current
Supply voltage range
Supply current
250 μV
0.1 pA
12 nV/√Hz
33 MHz
12 V/μs
20 mA
2.7V to 5.5V
The amplifier features several programmable controls includ-
ing: gain; a power-conserving shutdown mode which can
reduce current consumption to only 20 μA; an input zeroing
switch which allows the output offset voltage to be measured
to facilitate system calibration; and four levels of internal fre-
quency compensation which can be set to maximize band-
width at the different gain settings.
5.3 mA
V+ −50 mV to V− +50 mV
Rail-to-Rail output swing
Applications
Industrial instrumentation
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The LMP8100 comes in a 14-Pin SOIC package.
Data acquisition systems
Test equipment
Scaling amplifier
Gain control
Sensor interface
Simplified Block Diagram
20147607
LMP® is a registered trademark of National Semiconductor Corporation.
© 2007 National Semiconductor Corporation
201476
www.national.com