Datasheet > LMK04806

LMK04806

更新时间： 2024-11-19 11:11:07

品牌	Logo	应用领域
德州仪器 - TI		时钟
页数	文件大小	规格书
140页	2185K
描述
具有双级联 PLL 和集成式 2.5GHz VCO 的低噪声时钟抖动消除器

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LMK04803, LMK04805, LMK04806, LMK04808

SNAS489K –MARCH 2011–REVISED DECEMBER 2014

LMK0480x Low-Noise Clock Jitter Cleaner with Dual Loop PLLs

1 Features

3 Description

The LMK0480x family is the industry's highest

performance clock conditioner with superior clock

jitter cleaning, generation, and distribution with

advanced features to meet next generation system

•

Ultra-Low RMS Jitter Performance

–

111 fs RMS Jitter (12 kHz to 20 MHz)

123 fs RMS Jitter (100 Hz to 20 MHz)

requirements.

The

dual

loop

PLLatinum™

•

Dual Loop PLLatinum™ PLL Architecture

PLL1

architecture is capable of 111 fs rms jitter (12 kHz to

20 MHz) using a low noise VCXO module or sub-200

fs rms jitter (12 kHz to 20 MHz) using a low cost

external crystal and varactor diode.

–

Integrated Low-Noise Crystal Oscillator Circuit

Holdover Mode when Input Clocks are Lost

Automatic or Manual Triggering/Recovery

The dual loop architecture consists of two high-

performance phase-locked loops (PLL), a low-noise

crystal oscillator circuit, and a high-performance

voltage controlled oscillator (VCO). The first PLL

(PLL1) provides low-noise jitter cleaner functionality

while the second PLL (PLL2) performs the clock

generation. PLL1 can be configured to either work

with an external VCXO module or the integrated

crystal oscillator with an external tunable crystal and

varactor diode. When paired with a very narrow loop

bandwidth, PLL1 uses the superior close-in phase

noise (offsets below 50 kHz) of the VCXO module or

the tunable crystal to clean the input clock. The

output of PLL1 is used as the clean input reference to

PLL2 where it locks the integrated VCO. The loop

bandwidth of PLL2 can be optimized to clean the far-

out phase noise (offsets above 50 kHz) where the

integrated VCO outperforms the VCXO module or

tunable crystal used in PLL1.

•

PLL2

–

Normalized PLL Noise Floor of –227 dBc/Hz

Phase Detector Rate up to 155 MHz

OSCin Frequency-Doubler

Integrated Low-Noise VCO

•

2 Redundant Input Clocks with LOS

Automatic and Manual Switch-Over Modes

–

•

50 % Duty Cycle Output Divides, 1 to 1045 (Even

and Odd)

12 LVPECL, LVDS, or LVCMOS Programmable

Outputs

•

Digital Delay: Fixed or Dynamically Adjustable

25 ps Step Analog Delay Control.

14 Differential Outputs. Up to 26 Single Ended.

–

Up to 6 VCXO/Crystal Buffered Outputs

Device Information

•

Clock Rates of up to 1536 MHz

0-Delay Mode

REFERENCE

INPUTS

PART NUMBER

VCO FREQUENCY

Three Default Clock Outputs at Power Up

LMK04803

LMK04805

LMK04806

LMK04808

1840 to 2030 MHz

2148 to 2370 MHz

2370 to 2600 MHz

2750 to 3072 MHz

Multi-Mode: Dual PLL, Single PLL, and Clock

Distribution

•

Industrial Temperature Range: –40 to 85°C

3.15-V to 3.45-V Operation

(1) For all available packages, see the orderable addendum at

the end of the datasheet.

2 Dedicated Buffered/Divided OSCin Clocks

Package: 64-Pin WQFN (9.0 × 9.0 × 0.8 mm)

Simplified Schematic

OSCout0/

OSCout1

0XOWLSOHꢀ³FOHDQ´ꢀ

clocks at different

frequencies

Applications

Crystal or

VCXO

LMX2541

PLL+VCO

Recovered

³GLUW\´ꢀFORFNꢀRUꢀ

clean clock

•

Data Converter Clocking

CLKin0

CLKout0, 1

Backup

Reference

Clock

Wireless Infrastructure

CLKout2

CLKout3

LMK0480x

FPGA

Serializer/

Deserializer

CLKin1

Precision Clock

Conditioner

Networking, SONET/SDH, DSLAM

Medical / Video / Military / Aerospace

Test and Measurement

CLKout4, 5, 6, 7

CLKout8A

CLKout11

CLKout9

DAC

ADC

CPLD

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

12 3 4 5 6 7...140

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与LMK04806相关器件

型号	品牌	获取价格	描述	数据表
LMK04806B	TI	获取价格	Low-Noise Clock Jitter Cleaner with Dual Loop PLLs
LMK04806BISQ	TI	获取价格	Low-Noise Clock Jitter Cleaner with Dual Loop PLLs
LMK04806BISQ/NOPB	TI	获取价格	具有双级联 PLL 和集成式 2.5GHz VCO 的低噪声时钟抖动消除器 \| NKD \|
LMK04806BISQE/NOPB	TI	获取价格	具有双级联 PLL 和集成式 2.5GHz VCO 的低噪声时钟抖动消除器 \| NKD \|
LMK04806BISQX/NOPB	TI	获取价格	具有双级联 PLL 和集成式 2.5GHz VCO 的低噪声时钟抖动消除器 \| NKD \|
LMK04808	TI	获取价格	具有双环路 PLL 和集成式 2.9GHz VCO 的低噪声时钟抖动消除器
LMK04808B	TI	获取价格	Low-Noise Clock Jitter Cleaner with Dual Loop PLLs
LMK04808BISQ	TI	获取价格	Low-Noise Clock Jitter Cleaner with Dual Loop PLLs
LMK04808BISQ/NOPB	TI	获取价格	具有双环路 PLL 和集成式 2.9GHz VCO 的低噪声时钟抖动消除器 \| NKD \|
LMK04808BISQE/NOPB	TI	获取价格	Low-Noise Clock Jitter Cleaner with Dual Loop PLLs and Integrated 2.9 GHz VCO 64-WQFN -40

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