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LMH2191

更新时间: 2024-11-18 12:50:07
品牌 Logo 应用领域
美国国家半导体 - NSC 驱动器时钟
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10页 1478K
描述
Evaluation Board for the Dual Channel 52 MHz Clock Tree Driver

LMH2191 数据手册

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National Semiconductor  
Application Note 2028  
Gerrit Segers and Jaimy de Koning  
July 21, 2010  
Evaluation Board for the  
LMH2191  
General Description  
Detailed Operating Description  
The evaluation board is designed to help the evaluation of the  
LMH2191 Dual Channel 52 MHz Clock Tree Driver. The  
LMH2191 is ideal suitable for the distribution of a system clock  
to peripheral devices in mobile handsets. It provides a solu-  
tion to clocking issues such as limited drive capability, pro-  
tection of the master clock from varying loads and frequency  
pulling effects, isolation from noisy modules, and crosstalk  
isolation. It has very low phase noise which enables it to drive  
sensitive modules such as Wireless LAN and Bluetooth.  
The LMH2191 evaluation board is designed to have maxi-  
mum flexibility in evaluating the LMH2191 in various config-  
urations. The schematic, Bill of material and board layout can  
be found at the end of this document. In the following sections  
a description will be given on how the circuit works and how  
to setup the measurement bench. For the factory default  
jumper setting, please refer to the Configuration section.  
POWER SUPPLY  
The board is powered by the use of banana connections,  
which is mostly a preferable connector type rather than a multi  
pole connector. The DUT (LMH2191) uses a single supply  
called VBAT while the output buffer, used for monitoring the  
CLK outputs and the TCXO voltage, is powered by a dual  
supply (called V+ & V-). The supply for the DUT ranges from  
2.5V to 5.5V while the supply for the output buffer (LMH6559)  
has a fixed voltage of +5V and –5V. The output voltage of the  
LDO is 1.8V and can be monitored on an extra banana con-  
The setup of the evaluation board consist of three distin-  
guished segments.  
The first part is the TCXO oscillator that generates the clock  
signal that is fed to the clock buffer.  
The second part is the circuit around the LMH2191 itself. The  
DUT needs a stable supply to be able to operate adequately.  
Furthermore there is the possibility to switch each CLK output  
ON and OFF separately using a CLK request jumper setting  
or an external connector. Each clock output has several dif-  
ferent capacitive load settings which are selectable by using  
jumper shorts. Each clock output is also fed to an SMA con-  
nector.  
nector called VOUT  
.
TCXO SUPPLY  
The supply for this on-board oscillator is done by the  
LMH2191 via the VOUT pin. The VOUT voltage is decoupled by  
C13 and C14 and is connected to jumper J8 pin 2. For normal  
operation pin 1 and pin 2 are shorten and the LDO voltage is  
connected to the supply pin of the TCXO. If, for any reason,  
an external supply is needed, this supply voltage can be con-  
nected to J8 at the pins 3 and 4. Pin 3 is the supply of the  
TCXO and pin 4 is the ground connection. (NOTE: The jumper  
short for the pins 1 and 2 must be removed then).  
The third part is the output buffer, that makes it possible to  
monitor both clock outputs or the TCXO voltage one by one  
by jumper selection. The output buffer is capable to drive a  
50 ohm cable in order to connect the test board to measuring  
equipment.  
CLOCK BUFFER LMH2191  
The oscillator frequency of the TCXO or any external input  
frequency is fed to the SCLK_IN pin of the LMH2191 (DUT).  
The input of the DUT is AC coupled because of an internal  
coupling capacitor of around 30 pF. This means that any DC  
voltage added to the input frequency doesn't disturb the DUT  
from functioning.  
The DUT has two clock outputs which can be switched ON or  
OFF independently. When both outputs are switched OFF the  
part is in shutdown mode and that means that the LDO is  
switched OFF too. In case the TCXO is powered by the on  
board LDO of the DUT, the input frequency is switched OFF  
too. The current consumption drops down to zero. ON and  
OFF switching of the outputs is performed by both CLK_REQ  
inputs. Any of the clock outputs is OFF when the matching  
request input is low, thus connected to ground or a voltage  
below 400 mV.  
The testboard provides two jumpers J5 and J6 and the SMA  
edge launch connectors CON9 and CON10 connected to the  
CLK_REQ inputs, to switch the clock outputs ON or OFF.  
Each clock request input has an internal pull down resistor of  
200kΩ which means that when no jumper is placed the clock  
output is OFF. To force a clock output to ON the voltage on  
the request pin must raise above 1.4V. The voltage used to  
toggle the outputs ON or OFF is VBAT or an external voltage  
applied to the connectors CON9 and CON10. If an external  
voltage is used, the jumpers for J5 and J6 must be removed.  
30113705  
FIGURE 1. LMH2191 Evaluation Board  
© 2010 National Semiconductor Corporation  
301137  
www.national.com  

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