Datasheet > LMH2180SDE

LMH2180SDE

更新时间： 2024-09-10 19:51:51

品牌	Logo	应用领域
美国国家半导体 - NSC		驱动输出元件逻辑集成电路
页数	文件大小	规格书
16页	446K
描述
IC 2180 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), DSO8, LLP-8, Clock Driver

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LMH2180SDE 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
包装说明：	HVSON, SOLCC8,.11,20	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.15
Is Samacsys：	N	系列：	2180
输入调节：	STANDARD	JESD-30 代码：	S-XDSO-N8
JESD-609代码：	e0	长度：	3 mm
逻辑集成电路类型：	LOW SKEW CLOCK DRIVER	功能数量：	2
反相输出次数：		端子数量：	8
实输出次数：	2	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	UNSPECIFIED
封装代码：	HVSON	封装等效代码：	SOLCC8,.11,20
封装形状：	SQUARE	封装形式：	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	2.5/5 V
认证状态：	Not Qualified	座面最大高度：	0.8 mm
子类别：	Clock Drivers	最大供电电压 (Vsup)：	5 V
最小供电电压 (Vsup)：	2.4 V	标称供电电压 (Vsup)：	2.7 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	3 mm	最小 fmax：	75 MHz
Base Number Matches：	1

LMH2180SDE 数据手册

August 21, 2008

LMH2180

75 MHz Dual Clock Buffer

General Description

The LMH2180 is a high speed dual clock buffer designed for

portable communications and applications requiring multiple

accurate multi-clock systems. The LMH2180 integrates two

75 MHz low noise buffers with independent shutdown pins

into a small package. The LMH2180 ensures superb system

operation between the baseband and the oscillator signal

path by eliminating crosstalk between the multiple clock sig-

nals.

Features

(Typical values are: V_SUPPLY= 2.7V and C_L= 10 pF, unless

otherwise specified.)

Small signal bandwidth

Supply voltage range

Phase noise (V_IN= 1 V_PP

78 MHz

2.4V to 5V

■

−123 dBc/Hz

f_C= 38.4 MHz, Δf = 1 kHz)

Slew rate

Total supply current

106 V/μs

2.3 mA

30 µA

■

Unique technology and design provides the LMH2180 with

the ability to accurately drive both large capacitive and resis-

tive loads. Low supply current combined with shutdown pins

for each channel means the LMH2180 is ideal for battery

powered applications. This part does not use an internal

ground reference, thus providing additional system flexibility.

Shutdown current

Rail-to-rail input and output

Individual buffer enable pins

Rapid T_ontechnology

Crosstalk rejection circuitry

Packages:

The flexible buffers provide system designers the capacity to

manage complex clock signals in the latest wireless applica-

tions. Each buffer delivers 106 V/μs internal slew rate with

independent shutdown and duty cycle precision. Each input

is internally biased to 1V, removing the need for external re-

sistors. Both channels have rail-to-rail inputs and outputs, a

gain of one, and are AC coupled with the use of one capacitor.

8-Pin LLP, Solder Bump and no Pullback

—

8-Bump micro SMD

Temperature range

−40°C to 85°C

■

Applications

3G mobile applications

■

Replacing a discrete buffer solution with the LMH2180 pro-

vides many benefits: simplified board layout, minimized par-

asitic components, simplified BOM, design durability across

multiple applications, simplification of clock paths, and the

ability to reduce the number of clock signal generators in the

system. The LMH2180 is produced in the tiny packages min-

imizing the required PCB space.

WLAN–WiMAX modules

TD_SCDMA multi-mode MP3 and camera

GSM modules

Oscillator modules

■

Typical Application

30024602

300246

www.national.com

12 3 4 5 6 7...16

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与LMH2180SDE相关器件

型号	品牌	获取价格	描述	数据表
LMH2180SDE/NOPB	TI	获取价格	75 MHz Dual Clock Buffer 8-WSON -40 to 85
LMH2180SDX	NSC	获取价格	75 MHz Dual Clock Buffer
LMH2180SDX	TI	获取价格	LMH2180 75 MHz Dual Clock Buffer
LMH2180SDX/NOPB	TI	获取价格	75 MHz Dual Clock Buffer 8-WSON -40 to 85
LMH2180TM	TI	获取价格	LMH2180 75 MHz Dual Clock Buffer
LMH2180TM	NSC	获取价格	IC 2180 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA8, MICR
LMH2180TM/NOPB	TI	获取价格	75 MHz Dual Clock Buffer
LMH2180TMX	TI	获取价格	LMH2180 75 MHz Dual Clock Buffer
LMH2180TMX/NOPB	TI	获取价格	75 MHz Dual Clock Buffer 8-DSBGA
LMH2180YD	NSC	获取价格	75 MHz Dual Clock Buffer

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