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LMH0340SQE

更新时间： 2024-09-23 05:42:23
品牌 Logo 应用领域
美国国家半导体 - NSC 驱动器接口集成电路PC
页数 文件大小 规格书
26页 487K
描述
3 Gbps, HD, SD, DVB-ASI SDI Serializer and Cable Driver with LVDS Interface

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LMH0340SQE 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：PLASTIC, LLP-48Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.36差分输出：NO
驱动器位数：5输入特性：STANDARD
接口集成电路类型：LINE DRIVER接口标准：GENERAL PURPOSE
JESD-30 代码：S-PQCC-N48JESD-609代码：e0
长度：7 mm湿度敏感等级：2
功能数量：5端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
认证状态：Not Qualified最大接收延迟：
座面最大高度：0.8 mm最大供电电压：2.625 V
最小供电电压：2.375 V标称供电电压：2.5 V
电源电压1-最大：3.465 V电源电压1-分钟：3.135 V
电源电压1-Nom：3.3 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn85Pb15)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD宽度：7 mm
Base Number Matches：1

LMH0340SQE 数据手册

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October 5, 2009  
LMH0340, LMH0040,  
LMH0070, LMH0050  
3 Gbps, HD, SD, DVB-ASI SDI Serializer and Cable Driver  
with LVDS Interface  
General Description  
Key Specifications  
The LMH0340/0040/0070/0050 SDI Serializers are part of  
National’s family of FPGA-Attach SER/DES products sup-  
porting 5-bit LVDS interfaces with FPGAs. An FPGA Host will  
format data with supplied IP such that the output of the  
LMH0340 is compliant with the requirements of DVB-ASI,  
SMPTE 259M-C, SMPTE 292M and SMPTE 424M stan-  
dards. See Table 1 for details on which Standards are sup-  
ported per device.  
Output compliant with SMPTE 424M, SMPTE 292M,  
■
SMPTE 259M-C and DVB-ASI (See Table 1)  
Typical power dissipation: 440 mW  
■
■
30 ps typical output jitter (HD, 3G)  
Features  
LVDS Interface to Host FPGA  
■
■
■
■
■
■
■
The interface between the SER (Serializer) and the FPGA  
consists of a 5 bit wide LVDS data bus, an LVDS clock and  
an SMBus interface. The LMH0340/0040/0070 SER devices  
include an integrated cable driver which is fully compliant with  
all of the SMPTE specifications listed above. The LMH0050  
has a CML output driver that can drive a differential transmis-  
sion line or interface to a cable driver.  
No external VCO or clock ref required  
Integrated Variable Output Cable Driver  
3.3V SMBus configuration interface  
Integrated TXCLK PLL cleans clock noise  
Small 48pin LLP package  
Industrial Temperature range:-40°C to 85°C  
The FPGA-Attach SER/DES family is supported by a suite of  
IP which allows the design engineer to quickly develop video  
applications using the SER/DES products. The SER is pack-  
aged in a physically small 48 pin LLP package.  
Applications  
SDI interfaces for:  
■
Video Cameras  
DVRs  
—
—
—
—
Video Switchers  
Video Editing Systems  
General Block Diagram  
30017001  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 2009 National Semiconductor Corporation  
300170  
www.national.com  
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