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LMC568 PDF预览

LMC568

更新时间: 2024-11-22 22:47:03
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
6页 164K
描述
Low Power Phase-Locked Loop

LMC568 数据手册

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May 1999  
LMC568  
Low Power Phase-Locked Loop  
General Description  
The LMC568 is an amplitude-linear phase-locked loop con-  
sisting of a linear VCO, fully balanced phase detectors, and  
Features  
±
n Demodulates 15% deviation FM/FSK signals  
n Carrier Detect Output with hysteresis  
n Operation to 500 kHz input frequency  
a carrier detect output. LMCMOS technology is employed  
for high performance with low power consumption.  
±
n Low THD — 0.5% typ. for 10% deviation  
±
The VCO has a linearized control range of 30% to allow de-  
n 2V to 9V supply voltage range  
n Low supply current drain  
modulation of FM and FSK signals. Carrier detect is indi-  
cated when the PLL is locked to an input signal greater than  
26 mVrms. LMC568 applications include FM SCA and TV  
second audio program decoders, FSK data demodulators,  
and voice pagers.  
Typical Application (100 kHz input frequency, refer to notes pg. 3)  
DS009135-1  
Order Number LMC568CM or LMC568CN  
See NS Package Number M08A or N08E  
LMCMOS is a trademark of National Semiconductor Corporation.  
© 1999 National Semiconductor Corporation  
DS009135  
www.national.com  

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