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LMA1009 PDF预览

LMA1009

更新时间: 2024-09-23 22:31:11
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逻辑 - LOGIC /
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7页 191K
描述
12 x 12-bit Multiplier-Accumulator

LMA1009 数据手册

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LMA1009/2009  
12 x 12-bit Multiplier-Accumulator  
DEVICES INCORPORATED  
FEATURES  
DESCRIPTION  
The LMA1009 and LMA2009 are high- Data present at the A and B input regis-  
speed, low power 12-bit multiplier-accu- ters is latched on the rising edges of  
mulators. They are pin-for-pin equiva- CLK A and CLK B respectively. RND,  
lent to the TRW TDC1009/TMC2009 TC, ACC, and SUB controls are latched  
multiplier-accumulators. The LMA1009 on the rising edge of the logical OR of  
and LMA2009 are functionally identical; CLK AandCLK B. TCspecifiestheinput  
they differ only in packaging. Full ambi- as two’s complement  
20 ns Multiply-Accumulate Time  
LowPowerCMOSTechnology  
Replaces Fairchild TDC1009/  
TMC2009  
Two’s Complement or Unsigned  
Operands  
Accumulator Performs Preload,  
ent temperature range operation is (TC HIGH) or unsigned magnitude  
achieved by the use of advanced CMOS (TC LOW). RND, when HIGH, adds ‘1’  
Accumulate, and Subtract  
Three-State Outputs  
68-pinPLCC, J-Lead  
technology.  
to the most significant bit position of the  
least significant half of the product. Sub-  
sequent truncation of the 12 least signifi-  
cant bits produces a result correctly  
rounded to 12-bit precision.  
The LMA1009/2009 produces the 24-bit  
product of two 12-bit numbers. The  
results of a series of multiplications may  
be accumulated to form the sum of prod-  
ucts. Accumulation is performed to The ACC and SUB inputs control accu-  
27-bitprecisionwiththemultiplierprod- mulatoroperation. ACCHIGHresultsin  
uct sign extended as appropriate.  
addition of the multiplier product and  
the accumulator contents, with the result  
stored in the accumulator register on the  
rising edge of CLK R. ACC and SUB  
HIGH results in subtraction of the accu-  
mulator contents from the multiplier  
product, with the result stored in the  
accumulator register. With ACC LOW  
and SUB LOW, no accumulation occurs  
and the next product is loaded directly  
intotheaccumulatorregister. ACCLOW  
and SUB HIGH is undefined.  
LMA1009/2009 BLOCK DIAGRAM  
A
11-0  
B11-0  
12  
12  
A REGISTER  
B REGISTER  
CLK A  
CLK B  
RND  
TC  
ACC  
SUB  
The LMA1009/2009 output register (ac-  
cumulator register) is divided into three  
independently controlled sections. The  
least significant result (LSR) and most  
significant result (MSR) registers are 12  
bits in length. The extended result regis-  
ter (XTR) is 3 bits long.  
24  
R
R + A  
R – A  
A
OEX  
LEX  
LEM  
LEL  
27  
PASS R  
PRELOAD  
CONTROL  
LOGIC  
OEM  
OEL  
3
PREL  
Each output register has an independ-  
ent output enable control. In addition  
to providing control of the three-state  
output buffers, when OEX, OEM, or  
OELareHIGHandPRELisHIGH, data  
can be preloaded via the bidirectional  
output pins into the respective output  
registers. Data present on the output  
pins is latched on the rising edge of  
CLK R. The interrelation of PREL and  
the enable controls is summarized in  
Table 1.  
3
OEX  
OEM  
OEL  
LEX  
27  
LEM  
LEL  
3
12  
12  
CLK R  
ACCUMULATOR REGISTER  
OEX  
OEM  
12  
OEL  
12  
3
R
26-24  
R
23-12  
R11-0  
Multiplier-Accumulators  
03/29/2000–LDS.10/2009-L  
1

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