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LM9648EVAL-KIT

更新时间： 2024-11-26 22:24:35
品牌 Logo 应用领域
美国国家半导体 - NSC 传感器图像传感器
页数 文件大小 规格书
2页 89K
描述
LM9648 Color CMOS Image Sensor SXGA 18 FPS

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中文翻译

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LM9648EVAL-KIT 数据手册

 浏览型号LM9648EVAL-KIT的Datasheet PDF文件第2页 
ADVANCE INFORMATION  
May 2002  
LM9648 Color CMOS Image Sensor SXGA 18 FPS  
General Description  
Applications  
The LM9648 is a high performance, low power, 1/2" SXGA  
CMOS Active Pixel Sensor capable of capturing color still or  
motion images and converting them to a digital data stream.  
f Dual Mode Camera  
f Digital Still Camera  
f Security Camera  
f Machine Vision  
Mega-pixel class image quality is achieved by integrating a high  
performance analog signal processor comprising of  
a high  
speed 10 bit A/D convertor, fixed pattern noise elimination cir-  
cuits and separate color gain amplifiers. The offset and black  
level can be automatically adjusted on chip using a full loop  
black level compensation circuit.  
Key Specifications  
Total: 1032 x 1312  
Array Format  
Active: 1032 x 1288  
Total: 6.30mm x 7.83mm  
Active: 6.27mm x 7.81mm  
Furthermore, a programmable smart timing and control circuit  
allowing the user maximum flexibility in adjusting integration  
time, active window size, gain, frame rate. Various control, tim-  
ing and power modes are also provided.  
Effective Image Area  
Optical Format  
Pixel Size  
1/2"  
6.0mm x 6.0mm  
8 & 10 Bit Digital  
18 frames per second  
57 dB  
Video Outputs  
Frame Rate  
Dynamic Range  
Shutter  
Features  
f Video and snapshot operation  
f Progressive scan read out with horizontal and vertical flip  
f Programmable Exposure:  
Rolling reset  
0.5%  
-
-
-
-
Master clock divider  
Inter row delay  
Inter frame delay  
FPN  
PRMU  
1.7%  
Partial frame integration  
Sensitivity  
2.5 volts/lux.s  
49%  
f Four channels of digitally programmable analog gain  
f Full automatic servo loop for black level & offset adjustment  
on each gain channel  
f Horizontal & vertical sub-sampling (2:1 & 4:2) with averaging  
f Windowing  
Fill Factor  
Color Mosaic  
Package  
Bayer pattern  
48 LCC  
f Programmable pixel clock, inter-frame and inter-line delays  
Single Supply  
Power Consumption  
Operating Temp  
3.0V +/- 10%  
150mW  
2
f I C compatible serial control interface  
f Power on reset & power down mode  
o
o
-10 C to 50 C  
Overall Chip Block Diagram  
sclk sda sadr  
resetb  
POR  
pwd  
mclk  
2
APS Array  
I C Compatible  
Serial I/F  
Register  
Bank  
Power  
Control  
clk gen  
snapshot  
extsync  
Master Sensor Controller  
+/-  
+/-  
+/-  
+/-  
ch0  
d[9:0]  
pclk  
ch1  
ch2  
ch3  
MUX  
10 bit A/D  
Column CDS  
hsync  
vsync  
ã 2002 National Semiconductor Corporation  
www.national.com  
12

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