LM9638BCEA

更新时间： 2024-02-23 07:02:21

品牌	Logo	应用领域
美国国家半导体 - NSC		传感器图像传感器
页数	文件大小	规格书
2页	202K
描述
Monochrome CMOS Image Sensor SXGA 18 FPS

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LM9638BCEA 数据手册

ADVANCE INFORMATION

May 2002

LM9638 Monochrome CMOS Image Sensor SXGA 18 FPS

General Description

Applications

The LM9638 is a high performance, low power, 1/2" SXGA

CMOS Active Pixel Sensor capable of capturing monochrome

still or motion images and converting them to a digital data

stream.

f Security Camera

f Machine Vision

f Barcode Scanner

f Biometrics

Mega-pixel class image quality is achieved by integrating a high

performance analog signal processor comprising of

high

Key Specifications

speed 10 bit A/D convertor, fixed pattern noise elimination cir-

cuits and a programmable gain amplifier. The offset and black

level can be automatically adjusted on chip using a full loop

black level compensation circuit.

Total: 1032 x 1312

Active: 1032 x 1288

Array Format

Total: 6.30mm x 7.83mm

Active: 6.27mm x 7.81mm

Effective Image Area

Furthermore, a programmable smart timing and control circuit

allowing the user maximum flexibility in adjusting integration

time, active window size, gain, frame rate. Various control, tim-

ing and power modes are also provided.

Optical Format

Pixel Size

1/2"

6.0µm x 6.0µm

8 & 10 Bit Digital

18 frames per second

57 dB

Video Outputs

Frame Rate

Dynamic Range

Shutter

Features

f Video and snapshot operation

f Progressive scan read out with horizontal and vertical flip

f Programmable Exposure:

Rolling reset

0.5%

FPN

Master clock divider

Inter row delay

PRMU

1.7%

Inter frame delay

Partial frame integration

Sensitivity

2.40 volts/lux.s

49%

Fill Factor

f Programmable gain amplifier

f Full automatic servo loop for black level & offset adjustment

on each gain channel

f Horizontal & vertical sub-sampling (2:1 & 4:2) with averaging

f Windowing

Micro Lens

Package

none

48 LCC

Single Supply

Power Consumption

Operating Temp

3.0V +/- 10%

150mW

f Programmable pixel clock, inter-frame and inter-line delays

f I C compatible serial control interface

-10 C to 50 C

f Power on reset & power down mode

Overall Chip Block Diagram

sclk sda sadr

resetb

POR

pwd

mclk

APS Array

I C Compatible

Serial I/F

Power

Control

Bank

clk gen

snapshot

extsync

Master Sensor Controller

d[9:0]

pclk

+/-

Amp

10 bit A/D

Column CDS

hsync

vsync

2002 National Semiconductor Corporation

www.national.com

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