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LM2506 PDF预览

LM2506

更新时间: 2024-10-01 04:20:11
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
19页 852K
描述
Low Power Mobile Pixel Link (MPL) Level 0, 18-bit RGB Display Interface Serializer and Deserializer

LM2506 数据手册

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August 2006  
LM2506  
Low Power Mobile Pixel Link (MPL) Level 0, 18-bit RGB  
Display Interface Serializer and Deserializer  
General Description  
Features  
n RGB Display Interface support up to  
The LM2506 device adapts RGB style display interfaces to  
the Mobile Pixel Link (MPL) Level zero serial link. The  
LM2506 supports one RGB display at up to 18-bit color  
depth and 800 X 300 pixels (over 216 Mbps and 13.2 MHz  
PCLK) is supported. A mode pin configures the device as a  
Serializer (SER) or Deserializer (DES) so the same chip can  
be used on both sides of the interface.  
1
800 x 300 ⁄  
2
SVGA formats  
n MPL-Level 0 Physical Layer using two data and one  
clock signal  
n Low Power Consumption  
n Pinout mirroring enables straight through layout with  
minimal vias  
The interconnect is reduced from 22 signals to only 3 active  
signals with the LM2506 chipset easing flex interconnect  
design, size constraints and cost.  
n Level translation between host and display  
n Auto Power Down on STOP PCLK  
n Link power down mode reduces quiescent power  
The LM2506 in SER mode resides beside an application,  
graphics or baseband processor and translates a parallel  
bus from LVCMOS levels to serial Mobile Pixel Link levels for  
transmission over a flex cable (or coax) and PCB traces to  
the DES located near the display module.  
<
under 10 µA  
n 1.74V to 2.0V core / analog supply voltage range  
n 1.74V to 3.0V I/O supply voltage range  
n −30C to 85C Operating temperature range  
When the Power_Down (PD*) input is asserted on the SER,  
the MDn and MC line drivers are powered down to save  
current. The DES can be controlled by a separate Power-  
_Down input or via a signal from the SER (PDOUT*).  
System Benefits  
n Small Interface  
n Low Power  
n Low EMI  
n Intrinsic Level Translation  
The LM2506 implements the physical layer of the MPL Level  
0 Standard (MPL-0) and a 150 µA IB current (Class 0).  
Typical Application Diagram - Bridge Chips  
20125522  
© 2006 National Semiconductor Corporation  
DS201255  
www.national.com  

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