LM2502

更新时间： 2024-11-13 21:54:23

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
27页	1084K
描述
Mobile Pixel Link (MPL) Display Interface Serializer and Deserializer

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中文翻译

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数据手册

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LM2502 数据手册

August 2005

LM2502

Mobile Pixel Link (MPL) Display Interface Serializer and

Deserializer

General Description

Features

300 Mbps Dual Link Raw Throughput

The LM2502 device is a dual link display interface SERDES

that adapts existing CPU / video busses to a low power

current-mode serial MPL link. The chipset may also be used

for a RGB565 application with glue logic. The interconnect is

reduced from 22 signals to only 3 active signals with the

LM2502 chipset easing flex interconnect design, size and

cost.

n MPL Physical Layer (MPL-0)

n Pin selectable Master / Slave mode

n Frequency Reference Transport

n Complete LVCMOS / MPL Translation

n Interface Modes:

— 16-bit CPU, i80 or m68 style

— RGB565 with glue logic

n −30˚C to 85˚C Operating Range

n Link power down mode reduces I_DDZ10 µA

n Dual Display Support (CS1* & CS2*)

n Via-less MPL interconnect feature

n 3.0V Supply Voltage (V_DDand V_DDA

n Interfaces to 1.7V to 3.3V Logic (V_DDIO

The Master Serializer (SER) resides beside an application

processor or baseband processor and translates a parallel

bus from LVCMOS levels to serial MPL levels for transmis-

sion over a flex cable and PCB traces to the Slave Deseri-

alizer (DES) located near the display module.

Dual display support is provided for a primary and sub

display through the use of two ChipSelect signals. A Mode

pin selects either a i80 or m68 style interface.

)

The Power_Down (PD*) input controls the power state of the

MPL interface. When PD* is asserted, the MD1/0 and MC

signals are powered down to save current.

System Benefits

n Small Interface

n Low Power

n Low EMI

n Frequency Reference Transport

n Intrinsic Level Translation

The LM2502 implements the physical layer of the MPL Stan-

dard (MPL-0). The LM2502 is offered in NOPB (Lead-free)

UFBGA and LLP packages.

Typical Application Diagram

20093301

Ordering Information

NSID

Package Type

Package ID

49 Lead UFBGA style, 4.0 X 4.0 X 1.0 mm, 0.5 mm pitch

1000 std reel, LM2502SMX 4500 reel

LM2502SM

LM2502SQ

SLH49A

SQF40A

40 Lead LLP style, 5.0 X 5.0 X 0.8 mm, 0.4 mm pitch

1000 std reel, LM2502SQX 4500 reel

DS200933

www.national.com

12 3 4 5 6 7...27

中文翻译

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与LM2502相关器件

型号	品牌	获取价格	描述	数据表
LM2502SL	NSC	获取价格	IC LINE TRANSCEIVER, PBGA49, 4 X 4 MM, 1 MM HEIGHT, 0.50 MM PITCH, FBGA-49, Line Driver or
LM2502SM	NSC	获取价格	Mobile Pixel Link (MPL) Display Interface Serializer and Deserializer
LM2502SM/NOPB	TI	获取价格	IC,TV/VIDEO CIRCUIT,VIDEO LINK INTERFACE,BGA,49PIN,PLASTIC
LM2502SMX	NSC	获取价格	IC LINE TRANSCEIVER, PBGA49, 4 X 4 MM, 1 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, UFBGA-49, Li
LM2502SQ	NSC	获取价格	Mobile Pixel Link (MPL) Display Interface Serializer and Deserializer
LM2502SQ/NOPB	TI	获取价格	Mobile Pixel Link Display Interface Serializer and Deserializer
LM2502SQX	NSC	获取价格	IC LINE TRANSCEIVER, PQCC40, 5 X 5 MM, 0.80 MM HEIGHT, 0.40 MM PITCH, LEAD FREE, LLP-40, L
LM2502SQX/NOPB	TI	获取价格	Mobile Pixel Link (MPL) Display Interface Serializer and Deserializer 40-WQFN -30 to 85
LM25037	NSC	获取价格	Dual-Mode PWM Controller With Alternating Outputs
LM25037	TI	获取价格	LM25037/LM25037-Q1 Dual-Mode PWM Controller With Alternating Outputs

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