DEMO MANUAL DC2395A
LTC2325/LTC2324/LTC2320
Quad/Octal 16-Bit/14-Bit/12-Bit,
5Msps/2Msps/1.5Msps, Serial,
High Speed SAR ADCs
Description
Demonstration circuit 2395A features the LTC®2325/
LTC2324/LTC2320 family. With up to 5Msps, these differ-
ential, multiple channel, 16-bit, serial, high speed succes-
sive approximation register (SAR) ADCs are available in a
52-leadQFNpackage. EachADChasaninternal20ppm/°C
maximum drift reference and an SPI-compatible serial
interface that supports CMOS and LVDS logic. Note the
demo board is configured for CMOS operation by default;
see the note under JP8 for LVDS operation. The following
textreferstotheLTC2325,butappliestoallmembersofthe
family, the only difference being the number of channels,
the sample rate and/or the number of bits. The DC2395A
demonstrates the DC and AC performance oftheLTC2325
in conjunction with the DC890 PScope™ data collection
board. Alternatively, by connecting the DC2395A into a
customer application, the performance of the LTC2325
can be evaluated directly in that circuit.
Design files for this circuit board are available at
http://www.linear.com/demo/DC2395A
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and PScope
is a trademark of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
Assembly options
Table 1. DC2395A Assembly Options
VERSION
U1 PART NUMBER
LTC2320CUKG-16#PBF
LTC2324CUKG-16#PBF
LTC2325CUKG-16#PBF
LTC2320CUKG-14#PBF
LTC2324CUKG-14#PBF
LTC2325CUKG-14#PBF
LTC2320CUKG-12#PBF
LTC2324CUKG-12#PBF
LTC2325CUKG-12#PBF
MAX CONVERSION RATE
1.5Msps
2Msps
# OF BITS
MAX CLOCK FREQUENCY
52.5MHz
DC2395A-A
DC2395A-B
DC2395A-C
DC2395A-D
DC2395A-E
DC2395A-F
DC2395A-G
DC2395A-H
DC2395A-I
16
16
16
14
14
14
12
12
12
110MHz
5Msps
110MHz
1.5Msps
2Msps
52.5MHz
110MHz
5Msps
110MHz
1.5Msps
2Msps
52.5MHz
110MHz
5Msps
110MHz
dc2395af
1