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LH28F800BGHB-BL12 PDF预览

LH28F800BGHB-BL12

更新时间: 2024-02-25 20:41:45
品牌 Logo 应用领域
夏普 - SHARP 闪存存储内存集成电路
页数 文件大小 规格书
43页 274K
描述
8 M-bit (512 kB x 16) SmartVoltage Flash Memories

LH28F800BGHB-BL12 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:8 X 8 MM, FBGA-48Reach Compliance Code:unknown
风险等级:5.81Is Samacsys:N
最长访问时间:120 ns其他特性:BOTTOM BOOT BLOCK
启动块:BOTTOMJESD-30 代码:S-PBGA-B48
JESD-609代码:e0长度:8 mm
内存密度:8388608 bit内存集成电路类型:FLASH
内存宽度:16功能数量:1
端子数量:48字数:524288 words
字数代码:512000最高工作温度:85 °C
最低工作温度:-40 °C组织:512KX16
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装形状:SQUARE封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度):NOT SPECIFIED编程电压:3.3 V
认证状态:Not Qualified座面最大高度:1.2 mm
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED类型:NOR TYPE
宽度:8 mmBase Number Matches:1

LH28F800BGHB-BL12 数据手册

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LH28F800BG-L/BGH-L (FOR TSOP, CSP)  
8 M-bit (512 kB x 16) SmartVoltage  
Flash Memories  
LH28F800BG-L/BGH-L  
(FOR TSOP, CSP)  
DESCRIPTION  
• Enhanced data protection features  
– Absolute protection with VPP = GND  
– Block erase/word write lockout during power  
transitions  
The LH28F800BG-L/BGH-L flash memories with  
SmartVoltage technology are high-density, low-cost,  
nonvolatile, read/write storage solution for a wide  
range of applications. The LH28F800BG-L/BGH-L  
can operate at VCC = 2.7 V and VPP = 2.7 V. Their  
low voltage operation capability realizes longer  
battery life and suits for cellular phone application.  
Their boot, parameter and main-blocked  
architecture, flexible voltage and enhanced cycling  
capability provide for highly flexible component  
suitable for portable terminals and personal  
computers. Their enhanced suspend capabilities  
provide for an ideal solution for code + data storage  
applications. For secure code storage applications,  
such as networking, where code is either directly  
executed out of flash or downloaded to DRAM, the  
LH28F800BG-L/BGH-L offer two levels of protection  
: absolute protection with VPP at GND, selective  
hardware boot block locking. These alternatives  
give designers ultimate control of their code security  
needs.  
– Boot blocks protection with WP# = VIL  
• SRAM-compatible write interface  
• Optimized array blocking architecture  
– Two 4 k-word boot blocks  
– Six 4 k-word parameter blocks  
– Fifteen 32 k-word main blocks  
– Top or bottom boot location  
• Enhanced cycling capability  
– 100 000 block erase cycles  
• Low power management  
– Deep power-down mode  
– Automatic power saving mode decreases ICC  
in static mode  
• Automated word write and block erase  
– Command user interface  
– Status register  
• ETOXTM V nonvolatile flash technology  
• Packages  
– 48-pin TSOP Type I (TSOP048-P-1220)  
Normal bend/Reverse bend  
FEATURES  
• SmartVoltage technology  
– 48-ball CSP (FBGA048-P-0808)  
– 2.7 V, 3.3 V or 5 V VCC  
– 2.7 V, 3.3 V, 5 V or 12 V VPP  
• High performance read access time  
LH28F800BG-L85/BGH-L85  
ETOX is a trademark of Intel Corporation.  
– 85 ns (5.0±0.25 V)/90 ns (5.0±0.5 V)/  
100 ns (3.3±0.3 V)/120 ns (2.7 to 3.6 V)  
LH28F800BG-L12/BGH-L12  
– 120 ns (5.0±0.5 V)/130 ns (3.3±0.3 V)/  
150 ns (2.7 to 3.6 V)  
• Enhanced automated suspend options  
– Word write suspend to read  
– Block erase suspend to word write  
– Block erase suspend to read  
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books,  
etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.  
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