Datasheet > LF9501

LF9501

更新时间： 2024-11-25 22:31:23

品牌	Logo	应用领域
逻辑 - LOGIC		/
页数	文件大小	规格书
7页	54K
描述
Programmable Line Buffer

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数据手册

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LF9501 数据手册

LF9501

DEVICES INCORPORATED

Programmable Line Buffer

LF9501

Programmable Line Buffer

DEVICES INCORPORATED

FEATURES

DESCRIPTION

The LF9501 is a high-speed, 10-bit

programmable line buffer. Some

applications the LF9501 is useful for

include sample rate conversion, data

time compression/ expansion, soft-

ware controlled data alignment, and

be programmed. Providing a delay

value on the LC10-0 inputs and driving

LCEN LOW will load the delay value

into the length control register on the

next selected clock edge. Two regis-

ters, one preceeding the program-

❑ 50 MHz Maximum Operating

Frequency

❑ Programmable Buffer Length from

2 to 1281 Clock Cycles

❑ 10-bit Data Inputs and Outputs

❑ Data Delay and Data Recirculation

programmable serial data shifting. By mable delay RAM and one following,

Modes

using the MODSEL pin, two different

modes of operation can be selected:

delay mode and data recirculation

mode. The delay mode provides a

minimum of 2 to a maximum of 1281

clock cycles of delay between the

input and output of the device. The

data recirculation mode provides a

feedback path from the data output to

the data input for use as a program-

mable circular buffer.

are included in the delay path. There-

fore, the programmed delay value

should equal the desired delay minus

2. This consequently means that the

value loaded into the length control

provide an overall range of 2 to 1281).

❑ Supports Positive or Negative Edge

System Clocks

❑ Expandable Data Word Width or

Buffer Length

❑ Replaces Harris HSP9501

❑ 44-pin PLCC, J-Lead

The active edge of the clock input,

either positive or negative edge, can

be selected with the clock select

(CLKSEL) input. All timing is based

on the active clock edge selected by

CLKSEL. Data can be held tempo-

rarily by using the clock enable

(CLKEN) input.

By using the length control input

(LC10-0) and the length control enable

(LCEN) the length of the delay buffer

or amount of recirculation delay can

LF9501 BLOCK DIAGRAM

MODSEL

LCO10-0 LCEN

DI9-0

DO9-0

CLKSEL

CLKEN

CLK

TO ALL REGISTERS

Video Imaging Products

08/16/2000–LDS.9501-H

12 3 4 5 6 7

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与LF9501相关器件

型号	品牌	获取价格	描述	数据表
LF9501JC15	LOGIC	获取价格	Pipeline Register, 10-Bit, CMOS, PQCC44, PLASTIC, LCC-44
LF9501JC20	LOGIC	获取价格	Programmable Line Buffer
LF9501JC25	LOGIC	获取价格	Programmable Line Buffer
LF9501JC31	LOGIC	获取价格	Pipeline Register, 10-Bit, CMOS, PQCC44, PLASTIC, LCC-44
LF9501JC40	LOGIC	获取价格	Pipeline Register, 10-Bit, CMOS, PQCC44, PLASTIC, LCC-44
LF9501JI20	LOGIC	获取价格	Pipeline Register, 10-Bit, CMOS, PQCC44, PLASTIC, LCC-44
LF9501JI25	LOGIC	获取价格	Pipeline Register, 10-Bit, CMOS, PQCC44, PLASTIC, LCC-44
LF9501JI40	LOGIC	获取价格	Pipeline Register, 10-Bit, CMOS, PQCC44, PLASTIC, LCC-44
LF9502	LOGIC	获取价格	2K Programmable Line Buffer
LF9502JC15	LOGIC	获取价格	Pipeline Register, 10-Bit, CMOS, PQCC44, PLASTIC, LCC-44