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LF412CH

更新时间: 2024-11-03 22:47:11
品牌 Logo 应用领域
美国国家半导体 - NSC 运算放大器
页数 文件大小 规格书
13页 563K
描述
Low Offset, Low Drift Dual JFET Input Operational Amplifier

LF412CH 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BCY包装说明:, CAN8,.2
针数:8Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.33.00.01
风险等级:5.84放大器类型:OPERATIONAL AMPLIFIER
架构:VOLTAGE-FEEDBACK最大平均偏置电流 (IIB):0.0002 µA
25C 时的最大偏置电流 (IIB):0.0002 µA最小共模抑制比:70 dB
标称共模抑制比:100 dB频率补偿:YES
最大输入失调电流 (IIO):0.025 µA最大输入失调电压:3000 µV
JESD-30 代码:O-MBCY-W8JESD-609代码:e0
低-偏置:YES低-失调:NO
湿度敏感等级:1负供电电压上限:-18 V
标称负供电电压 (Vsup):-15 V功能数量:2
端子数量:8最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:METAL
封装等效代码:CAN8,.2封装形状:ROUND
封装形式:CYLINDRICAL峰值回流温度(摄氏度):260
电源:+-15 V认证状态:Not Qualified
筛选级别:MIL-STD-883最小摆率:8 V/us
标称压摆率:15 V/us子类别:Operational Amplifier
最大压摆率:6.5 mA供电电压上限:18 V
标称供电电压 (Vsup):15 V表面贴装:NO
技术:BIPOLAR温度等级:MILITARY
端子面层:Tin/Lead (Sn63Pb37)端子形式:WIRE
端子位置:BOTTOM处于峰值回流温度下的最长时间:40
标称均一增益带宽:4000 kHz最小电压增益:25000

LF412CH 数据手册

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August 2000  
LF412  
Low Offset, Low Drift Dual JFET Input Operational  
Amplifier  
General Description  
Features  
n Internally trimmed offset voltage: 1 mV (max)  
n Input offset voltage drift: 10 µV/˚C (max)  
n Low input bias current: 50 pA  
These devices are low cost, high speed, JFET input opera-  
tional amplifiers with very low input offset voltage and guar-  
anteed input offset voltage drift. They require low supply  
current yet maintain a large gain bandwidth product and fast  
slew rate. In addition, well matched high voltage JFET input  
devices provide very low input bias and offset currents. The  
LF412 dual is pin compatible with the LM1558, allowing  
designers to immediately upgrade the overall performance of  
existing designs.  
n Low input noise current:  
n Wide gain bandwidth: 3 MHz (min)  
n High slew rate: 10V/µs (min)  
n Low supply current: 1.8 mA/Amplifier  
n High input impedance: 1012  
n Low total harmonic distortion 0.02%  
n Low 1/f noise corner: 50 Hz  
n Fast settling time to 0.01%: 2 µs  
These amplifiers may be used in applications such as high  
speed integrators, fast D/A converters, sample and hold  
circuits and many other circuits requiring low input offset  
voltage and drift, low input bias current, high input imped-  
ance, high slew rate and wide bandwidth.  
Typical Connection  
Connection Diagrams  
Metal Can Package  
00565642  
Order Number LF412MH, LF412CH  
or LF412MH/883 (Note 1)  
00565641  
See NS Package Number H08A  
Ordering Information  
LF412XYZ  
Dual-In-Line Package  
X indicates electrical grade  
Y indicates temperature range  
“M” for military  
“C” for commercial  
Z indicates package type  
“H” or “N”  
00565644  
Order Number LF412ACN, LF412CN  
or LF412MJ/883 (Note 1)  
See NS Package Number J08A or N08E  
BI-FET II is a trademark of National Semiconductor Corporation.  
© 2004 National Semiconductor Corporation  
DS005656  
www.national.com  

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