Philips Semiconductors Linear Products
Product specification
Sample-and-hold amplifiers
LF198/LF298/LF398
DESCRIPTION
PIN CONFIGURATIONS
The LF198/LF298/LF398 are monolithic sample-and-hold circuits
which utilize high-voltage ion-implant JFET technology to obtain
ultra-high DC accuracy with fast acquisition of signal and low droop
rate. Operating as a unity gain follower, DC gain accuracy is 0.002%
typical and acquisition time is as low as 6µs to 0.01%. A bipolar
input stage is used to achieve low offset voltage and wide
bandwidth. Input offset adjust is accomplished with a single pin and
does not degrade input offset drift. The wide bandwidth allows the
LF198 to be included inside the feedback loop of 1MHz op amps
FE, N Packages
1
2
3
4
8
7
6
5
V+
OFFSET VOLTAGE
INPUT
LOGIC
LOGIC REFERENCE
C
h
OUTPUT
V–
10
without having stability problems. Input impedance of 10 Ω allows
high source impedances to be used without degrading accuracy.
TOP VIEW
P-channel junction FETs are combined with bipolar devices in the
output amplifier to give droop rates as low as 5mV/min with a 1µF
hold capacitor. The JFETs have much lower noise than MOS
devices used in previous designs and do not exhibit high
temperature instabilities. The overall design guarantees no
feedthrough from input to output in the hold mode even for input
signals equal to the supply voltages.
1
D Package
1
14
13
12
11
10
9
INPUT
NC
V
Adj
OS
2
3
4
5
6
7
NC
V+
V–
LOGIC
LOGIC REF
NC
NC
Logic inputs are fully differential with low input current, allowing
direct connection to TTL, PMOS, and CMOS; differential threshold is
1.4V. The LF198/LF298/LF398 will operate from ±5V to ±18V
supplies. They are available in 8-pin plastic DIP, 8-pin Cerdip, and
14-pin plastic SO packages.
NC
NC
8
C
h
OUTPUT
TOP VIEW
FEATURES
NOTE:
1. SO and non-standard pinouts.
• Operates from ±5V to ±18V supplies
• Less than 10µs acquisition time
• TTL, PMOS, CMOS compatible logic input
• 0.5mV typical hold step at CH=0.01µF
• Low input offset
APPLICATION
• The LF198/LF298/LF398 are ideally suited for a wide variety of
sample-and-hold applications, including data acquisition,
analog-to-digital conversion, synchronous demodulation, and
automatic test setup
• 0.002% gain accuracy
• Low output noise in hold mode
• Input characteristics do not change during hold mode
• High supply rejection ratio in sample or hold
• Wide bandwidth
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
-55°C to +125°C
0 to +70°C
ORDER CODE
LF198FE
LF398D
DWG #
0580A
0175D
0580A
0404B
0580A
0404B
8-Pin Ceramic Dual In-Line Package (CERDIP)
14-Pin Plastic Small Outline (SO) Package
8-Pin Ceramic Dual In-Line Package (CERDIP)
8-Pin Plastic Dual In-Line Package (DIP)
8-Pin Ceramic Dual In-Line Package (CERDIP)
8-Pin Plastic Dual In-Line Package (DIP)
0 to +70°C
LF398FE
LF398N
0 to +70°C
-25°C to +85°C
-25°C to +85°C
LF298FE
LF298N
879
August 31, 1994
853-0135 13721