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LF398D

更新时间： 2024-11-22 22:47:11
品牌 Logo 应用领域
恩智浦 - NXP 放大器光电二极管
页数 文件大小 规格书
5页 133K
描述
Sample-and-hold amplifiers

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中文翻译

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LF398D 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP,针数：14
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.33.00.01风险等级：5.07
标称采集时间：20 µs放大器类型：SAMPLE AND HOLD CIRCUIT
最大模拟输入电压：11.5 V最小模拟输入电压：-11.5 V
JESD-30 代码：R-PDSO-G14长度：8.65 mm
负供电电压上限：-18 V标称负供电电压 (Vsup)：-15 V
功能数量：1端子数量：14
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
认证状态：Not Qualified采样并保持/跟踪并保持：SAMPLE
座面最大高度：1.75 mm供电电压上限：18 V
标称供电电压 (Vsup)：15 V表面贴装：YES
技术：JFET温度等级：COMMERCIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL宽度：3.9 mm
Base Number Matches：1

LF398D 数据手册

 浏览型号LF398D的Datasheet PDF文件第2页浏览型号LF398D的Datasheet PDF文件第3页浏览型号LF398D的Datasheet PDF文件第4页浏览型号LF398D的Datasheet PDF文件第5页 
Philips Semiconductors Linear Products  
Product specification  
Sample-and-hold amplifiers  
LF198/LF298/LF398  
DESCRIPTION  
PIN CONFIGURATIONS  
The LF198/LF298/LF398 are monolithic sample-and-hold circuits  
which utilize high-voltage ion-implant JFET technology to obtain  
ultra-high DC accuracy with fast acquisition of signal and low droop  
rate. Operating as a unity gain follower, DC gain accuracy is 0.002%  
typical and acquisition time is as low as 6µs to 0.01%. A bipolar  
input stage is used to achieve low offset voltage and wide  
bandwidth. Input offset adjust is accomplished with a single pin and  
does not degrade input offset drift. The wide bandwidth allows the  
LF198 to be included inside the feedback loop of 1MHz op amps  
FE, N Packages  
1
2
3
4
8
7
6
5
V+  
OFFSET VOLTAGE  
INPUT  
LOGIC  
LOGIC REFERENCE  
C
h
OUTPUT  
V–  
10  
without having stability problems. Input impedance of 10 Ω allows  
high source impedances to be used without degrading accuracy.  
TOP VIEW  
P-channel junction FETs are combined with bipolar devices in the  
output amplifier to give droop rates as low as 5mV/min with a 1µF  
hold capacitor. The JFETs have much lower noise than MOS  
devices used in previous designs and do not exhibit high  
temperature instabilities. The overall design guarantees no  
feedthrough from input to output in the hold mode even for input  
signals equal to the supply voltages.  
1
D Package  
1
14  
13  
12  
11  
10  
9
INPUT  
NC  
V
Adj  
OS  
2
3
4
5
6
7
NC  
V+  
V–  
LOGIC  
LOGIC REF  
NC  
NC  
Logic inputs are fully differential with low input current, allowing  
direct connection to TTL, PMOS, and CMOS; differential threshold is  
1.4V. The LF198/LF298/LF398 will operate from ±5V to ±18V  
supplies. They are available in 8-pin plastic DIP, 8-pin Cerdip, and  
14-pin plastic SO packages.  
NC  
NC  
8
C
h
OUTPUT  
TOP VIEW  
FEATURES  
NOTE:  
1. SO and non-standard pinouts.  
• Operates from ±5V to ±18V supplies  
• Less than 10µs acquisition time  
• TTL, PMOS, CMOS compatible logic input  
• 0.5mV typical hold step at CH=0.01µF  
• Low input offset  
APPLICATION  
• The LF198/LF298/LF398 are ideally suited for a wide variety of  
sample-and-hold applications, including data acquisition,  
analog-to-digital conversion, synchronous demodulation, and  
automatic test setup  
• 0.002% gain accuracy  
• Low output noise in hold mode  
• Input characteristics do not change during hold mode  
• High supply rejection ratio in sample or hold  
• Wide bandwidth  
ORDERING INFORMATION  
DESCRIPTION  
TEMPERATURE RANGE  
-55°C to +125°C  
0 to +70°C  
ORDER CODE  
LF198FE  
LF398D  
DWG #  
0580A  
0175D  
0580A  
0404B  
0580A  
0404B  
8-Pin Ceramic Dual In-Line Package (CERDIP)  
14-Pin Plastic Small Outline (SO) Package  
8-Pin Ceramic Dual In-Line Package (CERDIP)  
8-Pin Plastic Dual In-Line Package (DIP)  
8-Pin Ceramic Dual In-Line Package (CERDIP)  
8-Pin Plastic Dual In-Line Package (DIP)  
0 to +70°C  
LF398FE  
LF398N  
0 to +70°C  
-25°C to +85°C  
-25°C to +85°C  
LF298FE  
LF298N  
879  
August 31, 1994  
853-0135 13721  
12345

中文翻译

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LF398D 替代型号

型号 品牌 替代类型 描述 数据表
NE5537D NXP

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