Datasheet > LF3304QC15

LF3304QC15

更新时间： 2024-11-26 22:06:35

品牌	Logo	应用领域
逻辑 - LOGIC		先进先出芯片
页数	文件大小	规格书
12页	133K
描述
Dual Line Buffer/FIFO

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中文翻译

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数据手册

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LF3304QC15 数据手册

LF3304

DEVICES INCORPORATED

Dual Line Buffer/FIFO

LF3304

Dual Line Buffer/FIFO

DEVICES INCORPORATED

FEATURES

DESCRIPTION

(common lengths), One 12-bit 8K

deep line buffer, or Two 12-bit 4K

FIFOs (independent operation).

The LF3304 is a dual line buffer/

FIFO, designed to operate at HDTV

rates. The LF3304 will operate in

two distinct modes: Line Buffer and

FIFO. In these modes the two memo-

ries can operate independently or

with common control.

❑ 100 MHz Data Rate for Video and

other High-Speed Applications

❑ One 24-bit, Tw o 12-bit, Three

8-bit Data Paths, or One Double

In FIFO mode, independent Read

Depth 12-bit

and Write Resets give the designer

control over the internal pointers

providing flexibility not commonly

found in ordinary FIFOs.

❑ Dual Modes:Line Buffer or FIFO

❑ User-ProgrammableFIFO Flags

The LF3304 comprises two 12-bit 4K

memories configurable in a variety of

ways including: Two 12-bit 4K deep

line buffers (independent lengths),

Three 8-bit 4K deep line buffers

❑ User-Resettable Read and Write

Pointers

The LF3304 operatates at a maximum

data rate of 100 MHz and is available

in a 100-lead PQFP package.

❑ Single 3.3 V Power Supply,

5 V Tolerant I/ O

❑ 100-lead PQFP

LF3304 BLOCK DIAGRAM

WCLKA

RCLKA

WENA

RENA

RRA

FFA

RAM ARRAY 1

CONTROL

FLAG

EFA

GENERATOR

PAFA

PAEA

RWA

OEA

VARIABLE LENGTH RAM ARRAY A

4K x 12-bit

AIN11-0

AOUT11-0

ADDRA

LDA

MASTER

LENGTH11-0

CONTROL

ADDRB

LDB

VARIABLE LENGTH RAM ARRAY B

4K x 12-bit

BOUT11-0

OEB

BIN11-0

WCLKB

RCLKB

WENB

RENB

FFB

RAM ARRAY 2

CONTROL

FLAG

EFB

GENERATOR

PAFB

PAEB

RRB

MODE1-0

RWB

Video Imaging Products

08/16/2000–LDS.3304-F

12 3 4 5 6 7...12

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