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LF256N PDF预览

LF256N

更新时间: 2024-11-21 22:47:11
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 运算放大器
页数 文件大小 规格书
14页 251K
描述
WIDE BANDWIDTH SINGLE J-FET OPERATIONAL AMPLIFIERS

LF256N 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:PLASTIC, DIP-8
针数:8Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.33.00.01
风险等级:5.81放大器类型:OPERATIONAL AMPLIFIER
架构:VOLTAGE-FEEDBACK最大平均偏置电流 (IIB):0.005 µA
25C 时的最大偏置电流 (IIB):0.0001 µA标称共模抑制比:100 dB
频率补偿:YES最大输入失调电压:6500 µV
JESD-30 代码:R-PDIP-T8JESD-609代码:e0
低-偏置:YES低-失调:NO
负供电电压上限:-22 V标称负供电电压 (Vsup):-20 V
功能数量:1端子数量:8
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP8,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:+-15/+-20 V认证状态:Not Qualified
最小摆率:7.5 V/us标称压摆率:12 V/us
子类别:Operational Amplifier最大压摆率:7 mA
供电电压上限:22 V标称供电电压 (Vsup):20 V
表面贴装:NO技术:BIPOLAR
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
标称均一增益带宽:5000 kHz最小电压增益:25000
Base Number Matches:1

LF256N 数据手册

 浏览型号LF256N的Datasheet PDF文件第2页浏览型号LF256N的Datasheet PDF文件第3页浏览型号LF256N的Datasheet PDF文件第4页浏览型号LF256N的Datasheet PDF文件第5页浏览型号LF256N的Datasheet PDF文件第6页浏览型号LF256N的Datasheet PDF文件第7页 
LF155-LF255-LF355  
LF156-LF256-LF356  
LF157-LF257-LF357  
WIDE BANDWIDTH  
SINGLE J-FET OPERATIONAL AMPLIFIERS  
.
.
.
HIGH INPUT IMPEDANCE J-FET INPUT  
STAGE  
HIGH SPEED J-FET OP-AMPs : up to 20MHz,  
50V/µs  
OFFSETVOLTAGEADJUSTMENTDOESNOT  
DEGRADE DRIFT OR COMMON-MODE  
REJECTION AS IN MOST OF MONOLITHIC  
AMPLIFIERS  
.
INTERNAL COMPENSATION AND LARGE  
N
DIP8  
(Plastic Package)  
D
SO8  
DIFFERENTIALINPUTVOLTAGECAPABILITY  
+
(UP TO VCC  
)
(Plastic Micropackage)  
TYPICAL APPLICATIONS  
.
.
.
.
PRECISION HIGH SPEED INTEGRATORS  
FAST D/A AND CONVERTERS  
HIGH IMPEDANCE BUFFERS  
WIDEBAND, LOW NOISE, LOW DRIFT  
AMPLIFIERS  
LOGARITHIMIC AMPLIFIERS  
PHOTOCELL AMPLIFIERS  
SAMPLE AND HOLD CIRCUITS  
ORDER CODES  
Package  
Temperature  
Range  
Part Number  
N
D
LF355, LF356, LF357  
LF255, LF256, LF257  
LF155, LF156, LF157  
Example : LF355N  
0oC, +70oC  
–40oC, +105oC  
–55oC, +125oC  
.
.
.
PIN CONNECTIONS (top view)  
1
2
3
4
8
DESCRIPTION  
7
6
5
These circuits are monolithic J-FET input operational  
amplifiers incorporating well matched, high voltage  
J-FET on the same chip with standardbipolar transis-  
tors.  
This amplifiers feature low input bias and offset cur-  
rents, low input offset voltage and input offset voltage  
drift,coupledwith offsetadjustwhichdoesnotdegrade  
driftor common-mode rejection.  
5 - Offset Null 2  
6 - Output  
7 - VCC  
1 - Offset Null 1  
2 - Inverting input  
3 - Non-inverting input  
The devicesarealso designedforhigh slew rate, wide  
bandwidth,extremelyfastsettlingtime,lowvoltageand  
current noise and a low 1/f noise level.  
+
-
8 - N.C.  
4 - VCC  
July 1998  
1/14  

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