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LF198H/883

更新时间： 2024-11-25 22:24:43
品牌 Logo 应用领域
美国国家半导体 - NSC 采样保持电路
页数 文件大小 规格书
13页 523K
描述
Monolithic Sample-and-Hold Circuits

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中文翻译

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LF198H/883 技术参数

是否Rohs认证： 不符合生命周期：Transferred
零件包装代码：BCY包装说明：TO-99, CAN8,.2
针数：8Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.22最长采集时间：25 µs
标称采集时间：20 µs放大器类型：SAMPLE AND HOLD CIRCUIT
最大模拟输入电压：11.5 V最小模拟输入电压：-11.5 V
JESD-30 代码：O-XBCY-W8JESD-609代码：e0
湿度敏感等级：1负供电电压上限：-18 V
标称负供电电压 (Vsup)：-15 V功能数量：1
端子数量：8最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：UNSPECIFIED
封装代码：TO-99封装等效代码：CAN8,.2
封装形状：ROUND封装形式：CYLINDRICAL
峰值回流温度（摄氏度）：260电源：+-15 V
认证状态：Not Qualified采样并保持/跟踪并保持：SAMPLE
筛选级别：MIL-STD-883子类别：Sample and Hold Circuit
供电电压上限：18 V标称供电电压 (Vsup)：15 V
表面贴装：NO技术：BIPOLAR
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：WIRE端子位置：BOTTOM
处于峰值回流温度下的最长时间：40

LF198H/883 数据手册

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July 2000  
LF198/LF298/LF398, LF198A/LF398A  
Monolithic Sample-and-Hold Circuits  
General Description  
Features  
±
±
n Operates from 5V to 18V supplies  
n Less than 10 µs acquisition time  
n TTL, PMOS, CMOS compatible logic input  
n 0.5 mV typical hold step at Ch = 0.01 µF  
n Low input offset  
The LF198/LF298/LF398 are monolithic sample-and-hold  
circuits which utilize BI-FET technology to obtain ultra-high  
dc accuracy with fast acquisition of signal and low droop  
rate. Operating as a unity gain follower, dc gain accuracy is  
0.002% typical and acquisition time is as low as 6 µs to  
0.01%. A bipolar input stage is used to achieve low offset  
voltage and wide bandwidth. Input offset adjust is accom-  
plished with a single pin, and does not degrade input offset  
drift. The wide bandwidth allows the LF198 to be included in-  
side the feedback loop of 1 MHz op amps without having sta-  
bility problems. Input impedance of 1010Ω allows high  
source impedances to be used without degrading accuracy.  
n 0.002% gain accuracy  
n Low output noise in hold mode  
n Input characteristics do not change during hold mode  
n High supply rejection ratio in sample or hold  
n Wide bandwidth  
n Space qualified, JM38510  
P-channel junction FET’s are combined with bipolar devices  
in the output amplifier to give droop rates as low as 5 mV/min  
with a 1 µF hold capacitor. The JFET’s have much lower  
noise than MOS devices used in previous designs and do  
not exhibit high temperature instabilities. The overall design  
guarantees no feed-through from input to output in the hold  
mode, even for input signals equal to the supply voltages.  
Logic inputs on the LF198 are fully differential with low input  
current, allowing direct connection to TTL, PMOS, and  
CMOS. Differential threshold is 1.4V. The LF198 will operate  
±
±
from 5V to 18V supplies.  
An “A” version is available with tightened electrical  
specifications.  
Typical Connection and Performance Curve  
Acquisition Time  
DS005692-32  
DS005692-16  
Functional Diagram  
DS005692-1  
© 2000 National Semiconductor Corporation  
DS005692  
www.national.com  
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LF198H/883 替代型号

型号 品牌 替代类型 描述 数据表
LF198AH/NOPB TI

功能相似

 单片采样保持电路 | LMC | 8 | -55 to 125
LF398H/NOPB TI

功能相似

 Monolithic Sample and Hold Circuit 8-TO-99 0 to 70

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