Datasheet > LE58QL021FJC

LE58QL021FJC

更新时间： 2024-11-23 21:00:43

品牌	Logo	应用领域
加拿大卓联 - ZARLINK		PC 电信电信集成电路
页数	文件大小	规格书
66页	663K
描述
PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC44, GREEN, PLASTIC, MS-018AC, LCC-44

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LE58QL021FJC 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
包装说明：	QCCJ, LDCC44,.7SQ	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.62
其他特性：	IT ALSO OPERATES WITH 3.3V ANALOG SUPPLY VOLTAGE	压伸定律：	A/MU-LAW
滤波器：	YES	最大增益公差：	0.4 dB
JESD-30 代码：	S-PQCC-J44	JESD-609代码：	e3
长度：	16.5862 mm	线性编码：	16-BIT
功能数量：	1	端子数量：	44
工作模式：	SYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	QCCJ	封装等效代码：	LDCC44,.7SQ
封装形状：	SQUARE	封装形式：	CHIP CARRIER
电源：	3.3 V	认证状态：	Not Qualified
座面最大高度：	4.572 mm	子类别：	Codecs
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	电信集成电路类型：	PCM CODEC
温度等级：	INDUSTRIAL	端子面层：	MATTE TIN
端子形式：	J BEND	端子节距：	1.27 mm
端子位置：	QUAD	宽度：	16.5862 mm
Base Number Matches：	1

LE58QL021FJC 数据手册

Le58QL02/021/031

Quad Low Voltage Subscriber Line Audio-Processing Circuit

VE580 Series

APPLICATIONS

Codec function on telephone switch line cards

ORDERING INFORMATION

Device

Package (Green)¹

44-pin PLCC

Packing²

Le58QL02FJC

Le58QL021FJC

Le58QL021BVC

Le58QL031DJC

Tube

Tray

FEATURES

Low-power, 3.3 V CMOS technology with 5-V tolerant

44-pin PLCC

44-pin TQFP

digital inputs

32-pin PLCC

Tube

Software and coefficient compatible to the Le79Q02/

1. The green package meets RoHS Directive 2002/95/EC of the

European Council to minimize the environmental impact of

electrical equipment.

021/031 QSLAC™ device

Performs the functions of four codec/filters

Software programmable:

— SLIC device input impedance

— Transhybrid balance

2. For delivery using a tape and reel packing system, add a "T" suffix

to the OPN (Ordering Part Number) when placing an order.

DESCRIPTION

— Transmit and receive gains

— Equalization (frequency response)

— Digital I/O pins

The Le58QL02/021/031 Quad Low Voltage Subscriber Line

Audio-Processing Circuit (QLSLAC™) devices integrate the

key functions of analog line cards into high-performance, very-

programmable, four-channel codec-filter devices. The

QLSLAC devices are based on the proven design of Legerity’s

reliable SLAC™ device families. The advanced architecture of

the QLSLAC devices implements four independent channels

and employs digital filters to allow software control of

transmission, thus providing a cost-effective solution for the

audio-processing function of programmable line cards. The

QLSLAC devices are software and coefficient compatible to the

QSLAC devices.

— Programmable debouncing on one input

— Time slot assigner

— Programmable clock slot and PCM transmit clock edge

options

Standard microprocessor interface

A-law, µ-law, or linear coding

Single or Dual PCM ports available

— Up to 128 channels (PCLK at 8.192 MHz) per PCM port

— Optional supervision on the PCM highway

Advanced submicron CMOS technology makes the Le58QL02/

021/031 QLSLAC devices economical, with both the

functionality and the low power consumption needed in line

card designs to maximize line card density at minimum cost.

When used with four Legerity SLIC devices, a QLSLAC device

provides a complete software-configurable solution to the

BORSCHT functions.

1.536, 1.544, 2.048, 3.072, 3.088, 4.096, 6.144, 6.176, or

8.192 MHz master clock derived from MCLK or PCLK

Built-in test modes with loopback, tone generation,

and µP access to PCM data

Mixed state (analog and digital) impedance scaling

Performance guaranteed over a 12 dB gain range

BLOCK DIAGRAM

Real Time Data register with interrupt (open drain or

Dual/Single

PCM

Highway

TTL output)

Analog

VIN₁

DXA

DRA

TSCA

DXB

Supports multiplexed SLIC device outputs

Broadcast state

Signal Processing

Channel 1 (CH 1)

VOUT₁

Time Slot Assigner

(TSA)

VIN₂

Signal Processing

Channel 2 (CH 2)

VOUT₂

DRB

TSCB

VIN₃

256 kHz or 293 kHz chopper clock for Legerity SLIC

Signal Processing

Channel 3 (CH 3)

VOUT₃

devices with switching regulator

VIN₄

Signal Processing

Channel 4 (CH 4)

VOUT₄

Maximum channel bandwidth for V.90 modems

VREF

SLIC

Clock

Reference

Circuits

CD1₁

CD2₁

C3₁

C4₁

C5₁

PCLK

MCLK/E1

CD1₂

CD2₂

C3₂

C4₂

SLIC

Interface

(SLI)

C5₂

RELATED LITERATURE

CD1₃

CD2₃

C3₃

C4₃

080754 Le58QL061/063 QLSLAC™ Device Data Sheet

C5₃

CD1₄

CD2₄

080761 QSLAC™ to QLSLAC™ Device Design

C3₄

C4₄

Conversion Guide

Microprocessor Interface

(MPI)

RST

C5₄

080758 QSLAC™ to QLSLAC™ Guide to New Designs

CHCLK

INT

DIO

DCLK

Microprocessor

Document ID# 080753 Date:

April 09, 2009

Version:

Distribution:

Public Document

12 3 4 5 6 7...66

中文翻译

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与LE58QL021FJC相关器件

型号	品牌	获取价格	描述	数据表
LE58QL021FJCT	ZARLINK	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC44, GREEN, PLASTIC, MS-018AC, LCC-44
LE58QL021FJCT	MICROSEMI	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC44, GREEN, PLASTIC, MS-018AC, LCC-44
LE58QL021JC	MICROSEMI	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC44, PLASTIC, MS-018AC, LCC-44
LE58QL021VC	MICROSEMI	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQFP44, MS-026ACB, TQFP-44
LE58QL022BVC	MICROCHIP	获取价格	PCM Codec
LE58QL022BVCT	MICROCHIP	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQFP44
LE58QL02FJC	MICROCHIP	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC44
LE58QL02FJCT	MICROSEMI	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC44, GREEN, PLASTIC, MS-018AC, LCC-44
LE58QL02JC	MICROSEMI	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC44, PLASTIC, MS-018AC, LCC-44
LE58QL031DJC	MICROCHIP	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC32

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