Datasheet > LDTC144EET1G

LDTC144EET1G

更新时间： 2024-10-29 02:47:59

品牌	Logo	应用领域
雷卯电子 - LEIDITECH		晶体管
页数	文件大小	规格书
9页	1383K
描述
Bias Resistor Transistors NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

LDTC144EET1G 数据手册

LDTC114EET1G Series

S-LDTC114EET1G Series

Bias Resistor Transistors

NPN Silicon Surface Mount Transistors

with Monolithic Bias Resistor Network

This new series of digital transistors is designed to replace a single

device and its external resistor bias network. The BRT (Bias Resistor

Transistor) contains a single transistor with a monolithic bias network

consisting of two resistors; a series base resistor and a base-emitter

resistor. The BRT eliminates these individual components by integrating

them into a single device. The use of a BRT can reduce both system

cost and board space. The device is housed in the SC-89 package

which is designed for low power surface mount applications.

SC-89

PIN 3

COLLECTOR

(OUTPUT)

• Simplifies Circuit Design

• Reduces Board Space

PIN 1

BASE

• Reduces Component Count

(INPUT)

• The SC-89 package can be soldered using wave or reflow. The

modified gull-winged leads absorb thermal stress during soldering

eliminating the possibility of damage to the die.

PIN 2

EMITTER

(GROUND)

•

We declare that the material of product compliance with

RoHS requirements.

•

S- Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC-Q101

Qualified and PPAP Capable.

MAXIMUM RATINGS (T = 25°C unless otherwise noted)

Rating

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

Symbol

Value

Unit

Vdc

CBO

CEO

Vdc

100

mAdc

THERMAL CHARACTERISTICS

Rating

Symbol

Value

Unit

Total Device Dissipation,

FR−4 Board (Note 1) @ T = 25°C

Derate above 25°C

200

1.6

mW/°C

Thermal Resistance,

Junction−to−Ambient (Note 1)

600

°C/W

Total Device Dissipation,

FR−4 Board (Note 2) @ T = 25°C

Derate above 25°C

300

2.4

mW/°C

Thermal Resistance,

Junction−to−Ambient (Note 2)

400

°C/W

Junction and Storage Temperature

Range

T , T

−55 to +150

°C

stg

Stresses exceeding Maximum Ratings may damage the device. Maximum

Ratings are stress ratings only. Functional operation above the Recommended

Operating Conditions is not implied. Extended exposure to stresses above the

Recommended Operating Conditions may affect device reliability.

1. FR−4 @ Minimum Pad

2. FR−4 @ 1.0 × 1.0 Inch Pad

1/9

Rev :01.06.2018

www.leiditech.com

12 3 4 5 6 7...9

中文翻译

下载PDF

与LDTC144EET1G相关器件

型号	品牌	获取价格	描述	数据表
LDTC144ELT1G	LRC	获取价格	Bias Resistor Transistor
LDTC144EM3T5G	LRC	获取价格	Bias Resistor Transistors
LDTC144GET1G	LRC	获取价格	Bias Resistor Transistor
LDTC144GET1G_15	LRC	获取价格	ias Resistor Transistor
LDTC144GET3G	LRC	获取价格	Bias Resistor Transistor
LDTC144TET1G	LRC	获取价格	Bias Resistor Transistor
LDTC144TET1G_15	LRC	获取价格	Bias Resistor Transistor
LDTC144TET3G	LRC	获取价格	Bias Resistor Transistor
LDTC144TM3T5G	LRC	获取价格	Bias Resistor Transistors
LDTC144VET1G	LRC	获取价格	NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network

与LDTC144EET1G相关文章

三星深化印度制造布局，供应链本地化进程加速
2024-10-29

13
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

13
纳微科技震撼发布GaNSlim革新氮化镓功率芯片
2024-10-18

39
意法半导体发布第四代SiC技术，助力电动汽车电驱
2024-10-15

46

产品中心

服务支持

精选活动

关于我们

帮助中心

LDTC144EET1G

LDTC144EET1G 数据手册

与LDTC144EET1G相关器件

与LDTC144EET1G相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

LDTC144EET1G

LDTC144EET1G 数据手册

与LDTC144EET1G相关器件

与LDTC144EET1G相关文章

您还可以找

您在本页遇到什么问题？