Datasheet > LDTA114YM3T5G

LDTA114YM3T5G

更新时间： 2024-10-29 11:37:31

品牌	Logo	应用领域
乐山 - LRC		晶体晶体管
页数	文件大小	规格书
11页	191K
描述
Bias Resistor Transistors

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LDTA114YM3T5G 数据手册

LESHAN RADIO COMPANY, LTD.

Bias Resistor Transistors

PNP Silicon Surface Mount Transistors

LDTA114EM3T5G

Series

With Monolithic Bias Resistor Network

This new series of digital transistors is designed to replace a single

device and its external resistor bias network. The BRT (Bias Resistor

Transistor) contains a single transistor with a monolithic bias network

consisting of two resistors; a series base resistor and a base-emitter

resistor. The BRT eliminates these individual components by integrating

them into a single device. The use of a BRT can reduce both system

cost and board space. The device is housed in the SOT-723 package

which is designed for low power surface mount applications.

ƽSimplifies Circuit Design

SOT-723

ƽReduces Board Space

ƽReduces Component Count

PIN 3

COLLECTOR

(OUTPUT)

ƽThe SOT-723 Package can be Soldered using Wave or Reflow.

ƽAvailable in 4 mm, 8000 Unit Tape & Reel

PIN 1

BASE

(INPUT)

ƽThese are Pb-Free Devices.

PIN 2

EMITTER

(GROUND)

MAXIMUM RATINGS (T = 25°C unless otherwise noted)

Rating

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

Symbol

Value

Unit

Vdc

CBO

CEO

MARKING DIAGRAM

Vdc

100

mAdc

THERMAL CHARACTERISTICS

Characteristic

XX M

Symbol

Max

Unit

Total Device Dissipation

260 (Note 1)

600 (Note 2)

2.0 (Note 1)

4.8 (Note 2)

T = 25°C

mW/°C

°C/W

°C

Derate above 25°C

xx = Specific Device Code

= Date Code

Thermal Resistance –

Junction-to-Ambient

480 (Note 1)

205 (Note 2)

Junction and Storage

Temperature Range

–55 to +150

J, Tstg

1. FR–4 @ Minimum Pad

2. FR–4 @ 1.0 x 1.0 inch Pad

Version 1.0

LDTA114EM3T5G_S-1/11

12 3 4 5 6 7...11

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