Datasheet > LC82221L

LC82221L

更新时间： 2024-11-15 22:31:31

品牌	Logo	应用领域
三洋 - SANYO		解码器
页数	文件大小	规格书
7页	58K
描述
Motion JPEG Decoder

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中文翻译

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数据手册

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LC82221L 数据手册

Ordering number : EN *5846

CMOS IC

LC82221L

Motion JPEG Decoder

Preliminary

Overview

• Users can select either RGB or YUV for image data

output.

The LC82221L is a full-color digital image data expansion

IC that accepts data in formats that essentially conform to

the JPEG standard. With the provision of frame memory,

this IC can input and output image data in standard video

formats. In addition, it also supports a wide range of

image display functions using that frame memory. As

compared to earlier JPEG ICs, this IC features simplified

JPEG functionality and a greater emphasis on display

functions. Thus it supports the creation of excellent cost-

performance ratio systems for applications that require a

display system.

• Built-in YUV to RGB color conversion circuit

• The LC82221L supports image sizes up to 1024 pixels

in the horizontal direction. The range of vertical sizes

handled can be set up arbitrarily, since it is limited by

the size of the DRAM provided.

• 3.3-V single-voltage power supply. Low power.

• The display position and display size can be set.

• SOI and EOI marker support

• Horizontal and vertical scrolling display functions

• Support for overwrite display, in which the next data for

expansion is displayed by overwriting the previously

expanded image data

Features

• High image quality image expansion using the JPEG

system

• Superlative cost performance achieved by only

providing decoding functions.

Package Dimensions

unit: mm

• Two built-in quantization tables.

3214-SQFP144

• High-speed processing achieved by using fixed Huffman

tables. Application do not have to set up these tables.

• Two Huffman tables, one for luminance data and one for

chrominance data, are provided.

[LC82221L]

• Supports scaling factor parameters that allow the

quantization factor to be changed.

• DRAM for code data buffering and image data playback

can be connected directly.

• Applications can use either 2Mb or 4Mb DRAMs based

on the sizes of the image handled and the structure of the

system. However, 16-bit data path DRAMs must be

used.

• Image data is output in synchronization with an image

display synchronizing signal.

• Color structure of the code data is Y:U:V=4:1:1.

• Dedicated code data input bus provided to avoid loading

the host bus. DMA transfers are also supported.

SANYO: SQFP144

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

62698RM (OT) No. 5846-1/7

12 3 4 5 6 7

中文翻译

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