PreLIMINArY INforMAtIoN L9D112G80BG4
1.2 Gb, DDR - SDRAM Integrated Module (IMOD)
Benefits
FEATURES
53% SPACE savings vs. Monolithic,
TSOPII-66 solution
DDR SDRAM Data Rate = 200, 250,
266, and 333 Mbps
DQS edge-aligned with data for
READ; center-aligned with data for
WRITE
Reduced I/O routing (34%)
Package:
DLL to align DQx and DQSLx,
DQSHx transitions with CLKx
Reduced trace length providing
improved/reduced parasitic capaci-
tance
• 25mm x 25mm, Encapsulated
Plastic Ball Grid array (PBGA), 219
balls, 1.27mm pitch.
Four internal banks for concurrent
operation
Impedance matched (60ohm) pack-
2.5V ±0.2V Core Power supply
aging
One data mask per byte, IMOD con-
tains (10) bytes
2.5V ±0.2V I/O Power supply
(SSTL_2 compatible)
High TCE organic laminate inter-
poser
Programmable IOL/IOH Option
Auto PRECHARGE option
Differential Clock inputs (CLKx,
CLKx\)
Suitable for High Reliability applica-
tions
Commands entered on each positive
CLKx edge
Auto REFRESH and SELF
REFRESH Modes
Upgradable to 32M x 72/80:
L9D125G80BG4
Internal pipelined double-data-
rate (DDR) Architecture; two data
accesses per clock cycle
Available in INDUSTRIAL,
EXTENDED and Mil-Temp ranges
Organized as 16M x 72/80
Programmable Burst Length:
2, 4, or 8
Weight: LOGIC Devices, Inc.
L9D112G80BG4 = 2.75 grams
Bidirectional data strobe (DQSLx,
DQsHx) per byte transmitted/
received with data
typical
i.e. source-synchronous data capture
*Note: This integrated product and/or its specifications are subject to change without notice.
Latest document should be retrieved from LDI prior to your design consideration.
IMOD SOLUTION
MONOLITHIC SOLUTION
S
A
V
I
N
G
S
O
P
T
I
O
N
S
11.9
11.9
11.9
11.9
11.9
25mm
22.3
25mm
625mmꢀ
53%
34%
AREA
I/O
5 X 265mmꢀ = 1328mmꢀ PLUS
5 X 66 pins = 320 pins total
219 Balls/Locations
LOGIC Devices Incorporated
www.logicdevices.com
High Performance, Integrated Memory Module Product
1
Feb 2, 2009 LDS-L9D112G80BG4-C