Datasheet > L74VHC1G07

L74VHC1G07

更新时间： 2022-12-17 09:36:55

品牌	Logo	应用领域
乐山 - LRC		/
页数	文件大小	规格书
6页	220K
描述
Noninverting Buffer with Open Drain Output

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L74VHC1G07 数据手册

LESHAN RADIO COMPANY, LTD.

Noninverting Buffer with

Open Drain Output

L74VHC1G07

The L74VHC1G07 is an advanced high speed CMOS buffer with open drain output fabricated with silicon gate CMOS technology. It

achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.

The internal circuit is composed of three stages, including a buffer and an open drain output which provides the capability to set the

output switching level. This allows the L74VHC1G07 to be used to interface 5 V circuits to circuits of any voltage between V _CCand 7 V

using an external resistor and power supply.

The L74VHC1G07 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage.

• High Speed: t _PD= 3.8 ns (Typ) at V _CC= 5 V

• Low Internal Power Dissipation: I _CC= 2 mA (Max) at T _A= 25°C

• Power Down Protection Provided on Inputs

• Pin and Function Compatible with Other Standard Logic Families

• Chip Complexity: FET = 105; Equivalent Gate = 26

MARKING DIAGRAMS

V7^d

SC–88A / SOT–353/SC–70

DF SUFFIX

Pin 1

d = Date Code

Figure 1. Pinout (Top View)

V7^d

Figure 2. Logic Symbol

TSOP–5/SOT–23/SC–59

DT SUFFIX

Pin 1

d = Date Code

FUNCTION TABLE

Inputs

Output

PIN ASSIGNMENT

IN A

GND

OUT Y

V _CC

ORDERING INFORMATION

See detailed ordering and shipping information in the

package dimensions section on page 5of this data sheet.

1/6

12 3 4 5 6

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