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KSZ8895MLU PDF预览

KSZ8895MLU

更新时间: 2024-11-15 12:20:43
品牌 Logo 应用领域
麦瑞 - MICREL 电信集成电路局域网(LAN)标准以太网:16GBASE-T
页数 文件大小 规格书
110页 1157K
描述
Integrated 5-Port 10/100 Managed Switch

KSZ8895MLU 数据手册

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KSZ8895MLU  
Integrated 5-Port 10/100 Managed Switch  
Rev.1.1  
switch fabric, a dedicated address lookup engine, and an  
on-chip frame buffer memory. The KSZ8895MLU  
contains five MACs and four intergrated PHYs. All PHYs  
support 10/100Base-T/TX.  
General Description  
The KSZ8895MLU is a highly-integrated Layer 2-  
managed 5-port switch with an optimized design and  
plentiful features, qualified to meet AEC-Q100 standard  
for automotive applications. It is designed for cost-  
sensitive 10/100Mbps 5-port switch systems with on-chip  
termination, lowest power consumption and internal core  
power controller. These features will save more system  
All registers of MACs and PHYs units can be managed  
by the SPI interface or the SMI interface. MIIM registers  
of the PHYs can be accessed through the MDC/MDIO  
interface. EEPROM can set all control registers for the  
unmanaged mode.  
cost. It has 1.4Gbps high-performance  
memory  
Datasheets and support documentation can be found on  
feature set such as power management, programmble  
rate limit and priority ratio, tag/port-based VLAN, packets  
filtering, quality of service (QoS) four-queues  
prioritization, management interface, and MIB counters.  
Port 5 is a MAC 5 MII interface with PHY mode. The  
SW5-MII interface can be connected to a processor with  
a MAC MII interface.  
bandwidth, shared memory based switch fabric with full  
non-blocking configuration. It also provides an extensive  
feature set such as power management, programmble  
rate limit and priority ratio, tag/port-based VLAN, packets  
filtering, quality of service (QoS) four-queues  
prioritization, management interface, and MIB counters.  
Port 5 is a MAC 5 MII interface with PHY mode. The  
SW5-MII interface can be connected to a processor with  
a MAC MII interface.  
The KSZ8895MLU provides multiple CPU control/data  
interfaces to effectively address both current and  
emerging fast Ethernet applications. Micrel’s web site at:  
www.micrel.com.  
The KSZ8895MLU consists of 10/100 PHYs with  
patented and enhanced mixed-signal technology, media  
access control (MAC) units, a high-speed non-blocking  
Functional Diagram  
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com  
M9999-100311-1.1  
October 2011  

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