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KS8893M PDF预览

KS8893M

更新时间: 2024-11-14 03:48:43
品牌 Logo 应用领域
麦瑞 - MICREL 电信集成电路开关局域网局域网(LAN)标准
页数 文件大小 规格书
106页 643K
描述
Integrated 3-Port 10/100 Managed Switch with PHYs Preliminary Data Sheet Rev. 1.0

KS8893M 技术参数

生命周期:Obsolete包装说明:QFP, QFP128,.67X.93,20
Reach Compliance Code:unknown风险等级:5.84
其他特性:ALSO REQUIRES 3.3V数据速率:100000 Mbps
JESD-30 代码:R-PQFP-G128长度:20 mm
功能数量:1端子数量:128
收发器数量:2最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:QFP128,.67X.93,20
封装形状:RECTANGULAR封装形式:FLATPACK
座面最大高度:3.4 mm标称供电电压:1.2 V
表面贴装:YES技术:CMOS
电信集成电路类型:LAN SWITCHING CIRCUIT温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD宽度:14 mm
Base Number Matches:1

KS8893M 数据手册

 浏览型号KS8893M的Datasheet PDF文件第2页浏览型号KS8893M的Datasheet PDF文件第3页浏览型号KS8893M的Datasheet PDF文件第4页浏览型号KS8893M的Datasheet PDF文件第5页浏览型号KS8893M的Datasheet PDF文件第6页浏览型号KS8893M的Datasheet PDF文件第7页 
KS8893M/ML/MI  
Integrated 3-Port 10/100 Managed Switch with PHYs  
Preliminary Data Sheet Rev. 1.0  
General Description  
The KS8893M contains two 10/100 transceivers with  
patented mixed-signal low-power technology, three  
media access control (MAC) units, a high-speed  
non-blocking switch fabric, a dedicated address  
lookup engine, and an on-chip frame buffer memory.  
The KS8893M, a highly integrated layer 2 managed  
switch, is designed for low port count, cost-sensitive  
10/100 Mbps switch systems. It offers an extensive  
feature set that includes rate limiting, tag/port-based  
VLAN, QoS priority, management, management  
information base (MIB) counters, MII/SNI, and CPU  
control/data interfaces to effectively address both  
current and emerging Fast Ethernet applications.  
Both PHY units support 10BASE-T and 100BASE-  
TX. In addition, one PHY unit supports 100BASE-  
FX.  
The KS8893ML is the single power supply version  
with all the identical rich features of the KS8893M.  
___________________________________________________________________________________________________  
Functional Diagram  
1K LOOK-UP  
ENGINE  
10/100  
HP AUTO  
MDIX  
10/100  
MAC 1  
T/TX/FX  
PHY 1  
QUEUE  
MANAGEMENT  
10/100  
T/TX  
HP AUTO  
MDIX  
10/100  
MAC 2  
PHY 2  
BUFFER  
MANAGEMENT  
RMII/MII/  
SNI  
10/100  
MAC 3  
FRAME  
BUFFERS  
SNI  
SPI  
MIB  
SPI  
COUNTERS  
MIIM  
CONTROL  
EEPROM  
REGISTERS  
INTERFACE  
SMI  
I2C  
P1 LED[3:0]  
P2 LED[3:0]  
LED  
STRAP IN  
CONFIGURATION  
DRIVERS  
June 2005  
1
M9999-063005  

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