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KM23V4200D PDF预览

KM23V4200D

更新时间: 2024-11-25 20:11:35
品牌 Logo 应用领域
三星 - SAMSUNG 有原始数据的样本ROM光电二极管内存集成电路
页数 文件大小 规格书
4页 72K
描述
MASK ROM, 256KX16, 120ns, CMOS, PDIP40

KM23V4200D 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP40,.6Reach Compliance Code:unknown
风险等级:5.92最长访问时间:120 ns
JESD-30 代码:R-PDIP-T40JESD-609代码:e0
内存密度:4194304 bit内存集成电路类型:MASK ROM
内存宽度:16端子数量:40
字数:262144 words字数代码:256000
最高工作温度:70 °C最低工作温度:
组织:256KX16封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP40,.6
封装形状:RECTANGULAR封装形式:IN-LINE
电源:3/3.3 V认证状态:Not Qualified
最大待机电流:0.00003 A子类别:MASK ROMs
最大压摆率:0.025 mA表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

KM23V4200D 数据手册

 浏览型号KM23V4200D的Datasheet PDF文件第2页浏览型号KM23V4200D的Datasheet PDF文件第3页浏览型号KM23V4200D的Datasheet PDF文件第4页 
KM23V4200D  
CMOS MASK ROM  
4M-Bit (256Kx16) CMOS MASK ROM (EPROM TYPE)  
GENERAL DESCRIPTION  
FEATURES  
The KM23V4200D is a fully static mask programmable ROM  
organized 262,144 x 16 bit. It is fabricated using silicon gate  
CMOS process technology.  
· 262,144 x 16 bit organization  
· Fast access time  
3.3V Operation : 100ns(Max.)  
3.0V Operation : 120ns(Max.)  
· Supply voltage : single +3.0V/ single +3.3V  
· Current consumption  
Operating : 25mA(Max.)  
Standby : 30mA(Max.)  
· Fully static operation  
· All inputs and outputs TTL compatible  
· Three state outputs  
This device operates with 3.0V or 3.3V power supply, and all  
inputs and outputs are TTL compatible.  
Because of its asynchronous operation, it requires no external  
clock assuring extremely easy operation.  
It is suitable for use in program memory of microprocessor, and  
data memory, character generator.  
The KM23V4200D is packaged in a 40-DIP.  
· Package  
-. KM23V4200D : 40-DIP-600  
FUNCTIONAL BLOCK DIAGRAM  
PIN CONFIGURATION  
A17  
X
MEMORY CELL  
MATRIX  
BUFFERS  
AND  
.
.
.
.
.
.
.
.
(262,144x16)  
VCC  
A17  
A16  
A15  
N.C  
CE  
Q15  
Q14  
Q13  
Q12  
Q11  
Q10  
Q9  
1
2
40  
39  
38  
37  
DECODER  
3
4
Y
SENSE AMP.  
BUFFERS  
36 A14  
5
BUFFERS  
AND  
A13  
A12  
6
35  
34  
7
DECODER  
A0  
8
33 A11  
A10  
32  
9
Q8  
10  
11  
12  
13  
31  
30 VSS  
A8  
28 A7  
A9  
. . .  
DIP  
VSS  
Q7  
Q6  
29  
CE  
OE  
Q0  
Q15  
CONTROL  
LOGIC  
Q5 14  
A6  
A5  
27  
26  
Q4  
Q3  
Q2  
Q1  
15  
16  
17  
18  
25 A4  
24 A3  
A2  
A1  
A0  
23  
22  
21  
Q0 19  
OE  
Pin Name  
A0 - A17  
Q0 - Q15  
CE  
Pin Function  
Address Inputs  
20  
Data Outputs  
Chip Enable  
Output Enable  
Power  
KM23C4200D  
OE  
VCC  
VSS  
Ground  
N.C  
No Connection  

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