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KM23C4100D-10 PDF预览

KM23C4100D-10

更新时间: 2024-11-01 20:11:19
品牌 Logo 应用领域
三星 - SAMSUNG 有原始数据的样本ROM光电二极管内存集成电路
页数 文件大小 规格书
5页 101K
描述
MASK ROM, 256KX16, 100ns, CMOS, PDIP40, 0.600 INCH, DIP-40

KM23C4100D-10 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP40,.6
针数:40Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.92最长访问时间:100 ns
其他特性:CONFIGURABLE AS 256K X 16备用内存宽度:8
JESD-30 代码:R-PDIP-T40JESD-609代码:e0
长度:52.42 mm内存密度:4194304 bit
内存集成电路类型:MASK ROM内存宽度:16
功能数量:1端子数量:40
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256KX16
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP40,.6封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:5.08 mm
最大待机电流:0.00005 A子类别:MASK ROMs
最大压摆率:0.05 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:15.24 mmBase Number Matches:1

KM23C4100D-10 数据手册

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KM23C4100D(G)  
CMOS MASK ROM  
4M-Bit (512Kx8 /256Kx16) CMOS MASK ROM  
GENERAL DESCRIPTION  
FEATURES  
The KM23C4100D(G) is a fully static mask programmable  
ROM fabricated using silicon gate CMOS process technology,  
and is organized either as 524,288 x 8 bit(byte mode) or as  
262,144 x 16 bit(word mode) depending on BHE voltage  
level.(See mode selection table)  
· Switchable orginization  
524,288 x 8(byte mode)  
262,144 x 16(word mode)  
· Fast access time : 80ns(Max.)  
· Supply voltage : single +5V  
· Current consumption  
Operating : 50mA(Max.)  
Standby : 50mA(Max.)  
· Fully static operation  
This device operates with a 5V single power supply, and all  
inputs and outputs are TTL compatible.  
Because of its asynchronous operation, it requires no external  
clock assuring extremely easy operation.  
· All inputs and outputs TTL compatible  
· Three state outputs  
· Package  
It is suitable for use in program memory of microprocessor, and  
data memory, character generator.  
-. KM23C4100D : 40-DIP-600  
-. KM23C4100DG : 40-SOP-525  
The KM23C4100D is packaged in  
KM23C4100DG in a 40-SOP.  
a
40-DIP and the  
FUNCTIONAL BLOCK DIAGRAM  
PIN CONFIGURATION  
A17  
X
MEMORY CELL  
MATRIX  
BUFFERS  
AND  
.
.
.
.
.
.
.
.
(262,144x16/  
524,288x8)  
DECORDER  
A8  
A17  
A7  
1
2
40  
A9  
39  
38  
Y
SENSE AMP.  
A6  
A10  
3
BUFFERS  
AND  
A5  
4
A11  
A12  
A13  
37  
36  
35  
DATA OUT  
BUFFERS  
A4  
5
DECORDER  
A0  
A3  
6
A-1  
A2  
7
34 A14  
A1  
8
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
A15  
A16  
. . .  
DIP  
&
SOP  
A0  
9
CE  
VSS  
BHE  
VSS  
10  
11  
12  
13  
14  
15  
16  
17  
18  
CE  
Q0/Q8  
Q7/Q15  
CONTROL  
LOGIC  
OE  
Q15/A-1  
Q7  
OE  
Q0  
Q8  
BHE  
Q14  
Q1  
Q6  
Q9  
Q2  
Q10  
Q13  
Q5  
Pin Name  
A0 - A17  
Pin Function  
Address Inputs  
Data Outputs  
Q12  
Q4  
Q3 19  
Q11  
Q0 - Q14  
20  
VCC  
Output 15(Word mode)/  
LSB Address(Byte mode)  
Q15 /A-1  
KM23C4100D(G)  
BHE  
CE  
Word/Byte selection  
Chip Enable  
OE  
Output Enable  
Power(+5.0V)  
Ground  
VCC  
VSS  

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