5秒后页面跳转
KK74AC652DW PDF预览

KK74AC652DW

更新时间: 2024-02-17 02:25:11
品牌 Logo 应用领域
可天士 - KODENSHI 总线驱动器总线收发器触发器
页数 文件大小 规格书
9页 625K
描述
Octal 3-State Bus Transceivers and D Flip-Flops High-Speed Silicon-Gate CMOS

KK74AC652DW 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknown风险等级:5.84
Base Number Matches:1

KK74AC652DW 数据手册

 浏览型号KK74AC652DW的Datasheet PDF文件第2页浏览型号KK74AC652DW的Datasheet PDF文件第3页浏览型号KK74AC652DW的Datasheet PDF文件第4页浏览型号KK74AC652DW的Datasheet PDF文件第5页浏览型号KK74AC652DW的Datasheet PDF文件第6页浏览型号KK74AC652DW的Datasheet PDF文件第7页 
TECHNICAL DATA  
KK74AC652  
Octal 3-State Bus Transceivers  
and D Flip-Flops  
High-Speed Silicon-Gate CMOS  
The KK74AC652 is identical in pinout to the LS/ALS652,  
HC/HCT652. The device inputs are compatible with standard CMOS  
outputs; with pullup resistors, they are compatible with LS/ALS outputs.  
These devices consists of bus transceiver circuits, D-type flip-flop,  
and control circuitry arranged for multiplex transmission of data directly  
from the data bus or from the internal storage registers. Direction and  
Output Enable are provided to select the read-time or stored data function.  
Data on the A or B Data bus, or both, can be stored in the internal D flip-  
flops by low-to-high transitions at the appropriate clock pins (A-to-B  
Clock or B-to-A Clock) regardless of the select or enable or enable  
control pins. When A-to-B Source and B-to-A Source are in the real-time  
transfer mode, it is also possible to store data without using the internal  
D-type flip-flops by simultaneously enabling Direction and Output  
Enable. In this configuration each output reinforces its input. Thus, when  
all other data sources to the two sets of bus lines are at high impedance,  
each set of bus lines will remain at its last state.  
ORDERING INFORMATION  
KK74AC652N Plastic  
KK74AC652DW SOIC  
TA = -40° to 85° C for all packages  
The KK74AC652 has noninverted outputs.  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
PIN ASSIGNMENT  
Low Input Current: 1.0 µA, 0.1 µA @ 25°C  
High Noise Immunity Characteristic of CMOS Devices  
Outputs Source/Sink 24 mA  
LOGIC DIAGRAM  
PIN 24=VCC  
PIN 12 = GND  
1

与KK74AC652DW相关器件

型号 品牌 获取价格 描述 数据表
KK74AC652N KODENSHI

获取价格

Octal 3-State Bus Transceivers and D Flip-Flops High-Speed Silicon-Gate CMOS
KK74AC74 KODENSHI

获取价格

Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS
KK74AC74D KODENSHI

获取价格

Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS
KK74AC74N KODENSHI

获取价格

Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS
KK74AC86 KODENSHI

获取价格

Quad 2-Input Exclusive OR Gate High-Speed Silicon-Gate CMOS
KK74AC86D KODENSHI

获取价格

Quad 2-Input Exclusive OR Gate High-Speed Silicon-Gate CMOS
KK74AC86N KODENSHI

获取价格

Quad 2-Input Exclusive OR Gate High-Speed Silicon-Gate CMOS
KK74ACT00 KODENSHI

获取价格

Quad 2-Input NAND Gate High-Speed Silicon-Gate CMOS
KK74ACT00D KODENSHI

获取价格

Quad 2-Input NAND Gate High-Speed Silicon-Gate CMOS
KK74ACT00N KODENSHI

获取价格

Quad 2-Input NAND Gate High-Speed Silicon-Gate CMOS