KK4015BD

更新时间： 2024-09-17 03:48:07

品牌	Logo	应用领域
可天士 - KODENSHI		移位寄存器光电二极管
页数	文件大小	规格书
6页	387K
描述
Dual 4-Stage Static Shift Register

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数据手册

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KK4015BD 数据手册

TECHNICAL DATA

KK4015B

Dual 4-Stage Static Shift Register

The KK4015B consists of two identical, independent, 4-stage serial-

input/parallel-output registers. Each register has independent CLOCK and

RESET inputs as well as a single serial DATA input. “Q” outputs are

available from each of the four stages on both registers. All register stages

are D-type, master-slave flip-flops. The logic level present at the DATA

input is transferred into the first register stage and shifted over one stage

at each positive-going clock transition. Resetting of all stages is

accomplished by a high level on the reset line. Register expansion to 8

stages using one KK4015B package, or to more than 8 stages using

additional KK4015B’s is possible.

ORDERING INFORMATION

KK4015BN Plastic

KK4015BD SOIC

T_A= -55° to 125° C for all packages

•

Operating Voltage Range: 3.0 to 18 V

Maximum input current of 1 µA at 18 V over full package-temperature

range; 100 nA at 18 V and 25°C

•

Noise margin (over full package temperature range):

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

PIN ASSIGNMENT

LOGIC DIAGRAM

FUNCTION TABLE

Inputs

Outputs

Clock Data Reset Q1

Q_n

Q_n-1

No change

PIN 16=V_CC

PIN 8= GND

X = don’t care

12 3 4 5 6

中文翻译

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与KK4015BD相关器件

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KK4015BN	KODENSHI	获取价格	Dual 4-Stage Static Shift Register
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