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KK4012BD PDF预览

KK4012BD

更新时间: 2024-11-25 03:48:07
品牌 Logo 应用领域
可天士 - KODENSHI 高压
页数 文件大小 规格书
5页 284K
描述
Dual 4-Input NAND Gate High-Voltage Silicon-Gate CMOS

KK4012BD 数据手册

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TECHNICAL DATA  
KK4012B  
Dual 4-Input NAND Gate  
High-Voltage Silicon-Gate CMOS  
The KK4012B NAND gates provide the system designer with direct  
emplementation of the NAND function.  
Operating Voltage Range: 3.0 to 18 V  
Maximum input current of 1 µA at 18 V over full package-temperature  
range; 100 nA at 18 V and 25°C  
Noise margin (over full package temperature range):  
1.0 V min @ 5.0 V supply  
2.0 V min @ 10.0 V supply  
2.5 V min @ 15.0 V supply  
ORDERING INFORMATION  
KK4012BN Plastic  
KK4012BD SOIC  
TA = -55° to 125° C for all packages  
LOGIC DIAGRAM  
PIN ASSIGNMENT  
NC = NO CONNECTION  
FUNCTION TABLE  
PINS 6, 8 = NO CONNECTION  
PIN 14 =VCC  
Inputs  
Output  
PIN 7 = GND  
A
L
B
C
X
X
L
D
X
X
X
L
Y
H
H
H
H
L
X
L
X
X
X
H
X
X
H
X
H
H
X = don’t care  
1

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