Datasheet > KAD5510P-21

KAD5510P-21

更新时间： 2023-12-20 18:44:15

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瑞萨 - RENESAS		/
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31页	1595K
描述
Low Power 10-Bit, 210MSPS ADC

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KAD5510P-21 数据手册

DATASHEET

KAD5510P

Low Power 10-Bit, 250/210/170/125MSPS ADC

FN7693

Rev 3.00

February 8, 2016

The KAD5510P is a family of low power, high performance

10-bit analog-to-digital converters. Designed with Intersil’s

proprietary FemtoCharge™ technology on a standard CMOS

process, the family supports sampling rates of up to

250MSPS. The KAD5510P is part of a pin-compatible portfolio

of 10-, 12- and 14-bit A/Ds with sample rates ranging from

125MSPS to 500MSPS.

Features

• 1.5GHz analog input bandwidth

• 60fs clock jitter

• Programmable gain, offset and skew control

• Over-range indicator

• Selectable clock divider: 1, 2 or 4

• Clock phase selection

A Serial Peripheral Interface (SPI) port allows for extensive

configurability, as well as fine control of various parameters

such as gain and offset.

• Nap and sleep modes

Digital output data is presented in selectable LVDS or CMOS

formats. The KAD5510P is available in a 48 Ld QFN package

with an exposed paddle. Operating from a 1.8V supply,

performance is specified across the industrial operating

temperature range (-40°C to +85°C).

• Two’s complement, gray code or binary data format

• DDR LVDS-compatible or LVCMOS outputs

• Programmable built-in test patterns

• Single-supply 1.8V operation

• Pb-free (RoHS compliant)

Key Specifications

• SNR = 60.7dBFS for f = 105MHz (-1dBFS)

Applications

• Power amplifier linearization

• SFDR = 86.1dBc for f = 105MHz (-1dBFS)

• Total Power Consumption

• Radar and satellite antenna array processing

• Broadband communications

- 234/189mW at 250/125MSPS (DDR Mode)

• High-performance data acquisition

• Communications test equipment

• WiMAX and microwave receivers

Related Literature

• KAD5510P-50 datasheet, “10-Bit, 500MSPS A/D Converter”

CLKP

CLKN

CLKOUTP

CLOCK

GENERATION

CLKOUTN

= -1.0dBFS

SNR = 60.7dBFS

SFDR = 85.9dBc

SINAD = 60.7dBFS

-20

-40

(DDR)

D[4:0]P

D[4:0]N

VINP

VINN

10-BIT

250 MSPS

ADC

DIGITAL

ERROR

CORRECTION

SHA

ORP

ORN

-60

VCM

LVDS/CMOS

DRIVERS

–

OUTFMT

1.25V

-80

SPI

CONTROL

OUTMODE

-100

-120

20M

40M

60M

80M

100M

120M

FREQUENCY (Hz)

FIGURE 2. SINGLE-TONE SPECTRUM AT 105MHz (250MSPS)

FIGURE 1.

FN7693 Rev 3.00

February 8, 2016

Page 1 of 31

12 3 4 5 6 7...31

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