Datasheet > K4E160412C-FC500

K4E160412C-FC500

更新时间： 2024-11-21 04:58:27

品牌	Logo	应用领域
三星 - SAMSUNG		动态存储器光电二极管
页数	文件大小	规格书
21页	257K
描述
EDO DRAM, 4MX4, 50ns, CMOS, PDSO24, 0.300 INCH, PLASTIC, TSOP2-26/24

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K4E160412C-FC500 数据手册

K4E170411C, K4E160411C

K4E170412C, K4E160412C

CMOS DRAM

4M x 4Bit CMOS Dynamic RAM with Extended Data Out

DESCRIPTION

This is a family of 4.194,304 x 4 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of

memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K

Ref.), access time (-50 or -60), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of

this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh

operation is available in L-version.

This 4Mx4 EDO DRAM family is fabricated using Samsung¢s advanced CMOS process to realize high band-width, low power consump-

tion and high reliability. It may be used as main memory unit for high level computer, microcomputer and personal computer.

FEATURES

• Part Identification

• Extended Data Out Mode operation

(Fast Page Mode with Extended Data Out)

• CAS-before-RAS refresh capability

- K4E170411C-B(F) (5V, 4K Ref.)

• RAS-only and Hidden refresh capability

- K4E160411C-B(F) (5V, 2K Ref.)

• Self-refresh capability (L-ver only)

- K4E170412C-B(F) (3.3V, 4K Ref.)

- K4E160412C-B(F) (3.3V, 2K Ref.)

• Fast parallel test mode capability

• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs

• Early Write or output enable controlled write

• JEDEC Standard pinout

• ActivePowerDissipation

Unit : mW

3.3V

• Available in Plastic SOJ and TSOP(II) packages

• Single +5V±10% power supply (5V product)

• Single +3.3V±0.3V power supply (3.3V product)

Speed

324

288

-50

-60

396

360

495

440

605

550

FUNCTIONAL BLOCK DIAGRAM

• Refresh Cycles

Part

NO.

Refresh Refresh period

RAS

CAS

VCC

Vcc

Vss

Control

Clocks

cycle

Normal L-ver

VBB Generator

K4E170411C

64ms

32ms

Data in

K4E170412C 3.3V

K4E160411C 5V

128ms

Buffer

Row Decoder

Refresh Timer

Refresh Control

Refresh Counter

K4E160412C 3.3V

DQ0

DQ3

Memory Array

4,194,304 x4

Cells

• Performance Range

A0-A11

(A0 - A10)*1

A0 - A9

Row Address Buffer

Col. Address Buffer

Speed

-50

Remark

tRAC

50ns

60ns

tCAC

15ns

tRC

84ns

tHPC

Data out

Buffer

Column Decoder

(A0 - A10)*1

20ns 5V/3.3V

-60

17ns 104ns 25ns 5V/3.3V

Note) *1 : 2K Refresh

SAMSUNG ELECTRONICS CO., LTD. reserves the right to

change products and specifications without notice.

12 3 4 5 6 7...21

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与K4E160412C-FC500相关器件

型号	品牌	获取价格	描述	数据表
K4E160412D	SAMSUNG	获取价格	4M x 4Bit CMOS Dynamic RAM with Extended Data Out
K4E160412D-B5000	SAMSUNG	获取价格	EDO DRAM, 4MX4, 50ns, CMOS, PDSO24, SOJ-26/24
K4E160412D-B6000	SAMSUNG	获取价格	EDO DRAM, 4MX4, 60ns, CMOS, PDSO24, SOJ-26/24
K4E160412D-BL50	SAMSUNG	获取价格	EDO DRAM, 4MX4, 50ns, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOJ-26/24
K4E160412D-BL60	SAMSUNG	获取价格	EDO DRAM, 4MX4, 60ns, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOJ-26/24
K4E160412D-F	SAMSUNG	获取价格	DRAM
K4E160412D-F6000	SAMSUNG	获取价格	EDO DRAM, 4MX4, 60ns, CMOS, PDSO24, TSOP2-26/24
K4E160412D-FL60	SAMSUNG	获取价格	EDO DRAM, 4MX4, 60ns, CMOS, PDSO24, 0.300 INCH, PLASTIC, TSOP2-26/24
K4E160811D	SAMSUNG	获取价格	2M x 8Bit CMOS Dynamic RAM with Extended Data Out
K4E160811D-B	SAMSUNG	获取价格	DRAM

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