Datasheet > K32L3A60VPJ1AT

K32L3A60VPJ1AT

更新时间： 2024-11-04 15:18:51

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
162页	1651K
描述
NXP’s Energy Efficient Cortex-M4 MCU with Cortex-M0+ and Advanced Security

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K32L3A60VPJ1AT 数据手册

NXP Semiconductors

Data Sheet: Technical Data

Document Number: K32L3A

Rev. 1, 09/2019

K32L3A

K32L3A60VPJ1AT

72 MHz Arm® Cortex®-M0+/M4F Dual Core Microcontroller

with up to 1280 KB Flash and 384 KB SRAM

The K32L3A family of devices is an ultra-low-power, dual core

solution ideal for applications that require a high performance

Cortex-M4F processor to run the application and an efficient

Cortex-M0+ to run low power operations such as sensor data

collection and perform low level operations that don't need the

full power of the M4 core.

176 VFBGA

9 x 9 x 1 mm Pitch 0.5 mm

Core Processor

Timers

• Arm Cortex-M4F core up to 72 MHz (high-speed run up to

72 MHz) for application code

• Arm Cortex-M0+ core up to 72 MHz (high-speed run up to

72 MHz) for low power operations

• 2 x 6 ch., 2 x 2 ch. Timer PWM Modules (TPM)

• 2 x 4 ch. Low Power Programmable Interrupt

Timer (LPIT)

• 3 Low Power Timer (LPTMR)

• Real Time Clock (RTC)

Memories

• One 56-bit Time stamp

• 1.25 MB program flash memory, 1 MB on the M4F domain

and 256 KB on the M0+ domain

Security and Integrity

• 384 KB SRAM, 256 KB on the M4F domain and 128 KB on

the M0+ domain

• 48 KB ROM with built-in bootloader

• 32 B system register file and 32 B RTC register file

• External bus interface (FlexBUS) for off-chip memory

expansion

• 80-bit unique identification number per chip

• Advanced Flash security and access control

• 16-bit or 32-bit Hardware CRC with

programmable generator polynomial

• Low-power Cryptographic Acceleration Unit

(CAU3) supporting AES128/196/256, DES/

3DES, SHA 256, RSA and ECC PK-256/

Curve25519

Clocks

• Low-Power Frequency-Locked Loop (LPFLL)

• Range 1: 48 MHz

• True Random Number Generator

• Up to 4 active anti-tamper detection pins

• Range 2: 72 MHz

• Internal Resistance-Capacitance Oscillators (IRCs)

• Fast-Speed IRC (48, 52, 56, 60 MHz)

• Slow-Speed IRC (8 MHz or 2 MHz)

• Low Power Oscillator (LPO - 1 kHz)

• Real Time Clock Oscillator (RTCOSC)

• System Clock Generation

Analog

• 1 x 12-bit single ended low-power ADC

• 2 x Low power comparator (LPCMP) each

containing a 6-bit DAC and programmable

reference input

• 1 x 12-bit low power digital-to-analog converter

(LPDAC)

• 1 x 1.2V/2.1V dual-range VREF

System

• Dual Direct Memory Access (DMA) controllers with

asynchronous capability

Peripherals

• 1 x Universal Serial Bus (USB) 2.0 Full Speed

(FS) controller with integrated hardware

transceiver, 5 V regulator and 2 KB USB RAM

• M4F: 16 channels, 64 inputs per channel

• M0+: 8 channels, 32 inputs per channel

NXP reserves the right to change the production detail specifications as may be

required to permit improvements in the design of its products.

12 3 4 5 6 7...162

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