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K32L2B21VFM0A PDF预览

K32L2B21VFM0A

更新时间: 2024-11-04 02:46:39
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恩智浦 - NXP 微控制器
页数 文件大小 规格书
112页 1427K
描述
K32 L2B Microcontroller

K32L2B21VFM0A 数据手册

 浏览型号K32L2B21VFM0A的Datasheet PDF文件第2页浏览型号K32L2B21VFM0A的Datasheet PDF文件第3页浏览型号K32L2B21VFM0A的Datasheet PDF文件第4页浏览型号K32L2B21VFM0A的Datasheet PDF文件第5页浏览型号K32L2B21VFM0A的Datasheet PDF文件第6页浏览型号K32L2B21VFM0A的Datasheet PDF文件第7页 
NXP Semiconductors  
K32L2B3x  
Data Sheet: Technical Data  
Rev. 3, 09/2020  
K32 L2B Microcontroller  
K32L2B31Vxx0A  
K32L2B21Vxx0A  
K32L2B11Vxx0A  
48 MHz Arm® Cortex®-M0+ and 64/128/256 KB Flash  
The K32 L2B series is optimized for cost-sensitive and battery-  
powered applications requiring low-power USB connectivity and  
an optional segment LCD (SLCD). The product offers:  
• Optional low power segment LCD up to 24x8 or 28x4  
• USB FS 2.0 device without requiring an external crystal  
• Embedded ROM with boot loader for flexible program  
upgrade  
32 QFN  
5x5 mm P 0.5 mm  
48 QFN  
7x7 mm P 0.5 mm  
• High accuracy internal voltage and clock reference  
• FlexIO to support any standard and customized serial  
peripheral emulation  
• Down to 54 uA/MHz in very low power run mode and 1.96  
uA in deep sleep mode (RAM + RTC retained)  
64 LQFP  
10x10 mm P 0.5 mm  
64 BGA  
5x5 mm P 0.5 mm  
Core Processor  
Peripherals  
• Arm® Cortex®-M0+ core up to 48 MHz  
• SLCD supporting up to 24x8 or 28x4 segments  
• USB full-speed 2.0 device controller supporting  
crystal-less operation  
Memories  
• 64/128/256 KB program flash memory  
• 32 KB SRAM  
• One UART module supporting ISO7816, operating  
up to 1.5 Mbit/s  
• 16 KB ROM with build-in bootloader  
• 32-byte backup register  
• Two low-power UART modules supporting  
asynchronous operation in low-power modes  
• Two I2C modules and I2C0 supporting up to 1  
Mbit/s  
• Two 16-bit SPI modules supporting up to 24 Mbit/s  
• One FlexIO module supporting emulation of  
additional UART, SPI, I2C, PWM and other serial  
modules, etc.  
• One 16-bit 461 ksps ADC module with high  
accuracy internal voltage reference (Vref) and up to  
16 channels  
• High-speed analog comparator containing a 6-bit  
DAC for programmable reference input  
• One 12-bit DAC  
System  
• 4-channel asynchronous DMA controller  
• Watchdog  
• Low-leakage wakeup unit  
• Two-pin Serial Wire Debug (SWD) programming and  
debug interface  
• Micro Trace Buffer  
• Bit manipulation engine  
• Interrupt controller  
Clocks  
• 48 MHz high accuracy (up to 0.5%) internal reference  
clock  
• 1.2 V internal voltage reference  
• 8 MHz/2 MHz high accuracy (up to 3%) internal  
reference clock  
• 1 KHz reference clock active under all low-power  
modes (except VLLS0)  
I/O  
• Up to 50 general-purpose input/output pins (GPIO)  
and 6 high-drive pad  
• 32–40 KHz and 3–32 MHz crystal oscillator  
NXP reserves the right to change the production detail specifications as may be  
required to permit improvements in the design of its products.  

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