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K32L2A31VLH1A PDF预览

K32L2A31VLH1A

更新时间: 2024-11-04 02:51:19
品牌 Logo 应用领域
恩智浦 - NXP 微控制器静态存储器
页数 文件大小 规格书
96页 1141K
描述
K32 L2A Microcontroller with 512 KB Flash and 128 KB SRAM

K32L2A31VLH1A 数据手册

 浏览型号K32L2A31VLH1A的Datasheet PDF文件第2页浏览型号K32L2A31VLH1A的Datasheet PDF文件第3页浏览型号K32L2A31VLH1A的Datasheet PDF文件第4页浏览型号K32L2A31VLH1A的Datasheet PDF文件第5页浏览型号K32L2A31VLH1A的Datasheet PDF文件第6页浏览型号K32L2A31VLH1A的Datasheet PDF文件第7页 
NXP Semiconductors  
K32L2Ax  
Data Sheet: Technical Data  
Rev. 3, 02/2021  
K32 L2A Microcontroller with 512  
K32L2A41VLL1A  
K32L2A31VLL1A  
K32L2A41VLH1A  
K32L2A31VLH1A  
KB Flash and 128 KB SRAM  
72 MHz Cortex-M0+ based Microcontroller  
Supports ultra-low-power Arm based microcontroller with crystal-  
less USB feature, large flash and RAM, evolutionary low-power  
peripherals and security features. This is an ideal solution for  
Sensor Hub applications, Smart Energy, Internet of Things, and  
Edge and Concentrator. This device offers:  
• 128 KB SRAM for data processing and connectivity stack  
• Ultra low dynamic and static power consumption with smart  
peripherals for low power applications  
• Advanced LPI2C and LPSPI supporting asynchronous  
DMA master data transition  
100 LQFP  
64 LQFP  
• FlexIO for flexible and high performance interfaces  
• Crypto acceleration with AES/DES/3DES/MD5/SHA and  
TRNG  
14x14 mm P 0.5 mm 10x10 mm P 0.5 mm  
• USB FS 2.0 device operation without need of external  
crystal  
• USB FS OTG controller, capable of USB host or device operation  
Core  
• Arm® Cortex®-M0+ cores up to 72 MHz in Normal  
mode and 96 MHz in High Speed mode  
Communication interfaces  
• Three 16-bit Low Power Serial Peripheral Interface  
(LPSPI) modules  
• One EMVSIM module supporting EMV version 4.3,  
ISO7816  
• Three LPUART modules  
• Three LPI2C modules supporting up to 5 Mbit/s  
• One FlexIO module emulating UART, SPI, camera  
interface, and Motorola 68K/Intel 8080 bus  
• USB FS 2.0 device operation without need of  
external crystal  
Memories  
• Up to 512 KB program flash memory  
• 128 KB SRAM  
• 32 KB ROM with built-in bootloader  
System peripherals  
• 8-channel DMA controller  
• Independent clocked Watchdog  
• Low-leakage wakeup unit  
• SWD debug interface and Micro Trace Buffer  
• Bit Manipulation Engine  
• USB FS OTG controller, capable of USB host or  
device operation  
Analog Modules  
• Memory Mapped Divide and Square Root module  
(MMDVSQ)  
• Cyclic Redundancy Check (CRC) module  
• Nested Vector Interrupt Controller (NVIC) supports 32  
interrupt vectors  
• 16-bit, 24-channel SAR ADC with internal voltage  
reference  
• Two High-speed analog comparators each  
containing a 6-bit DAC and programmable reference  
input  
• Additional peripheral interrupt support via Interrupt  
Multiplexer (INTMUX)  
• One 12-bit DAC  
• 1.2 V and 2.1 V voltage references (Vref)  
Clocks  
Timers  
• One 6-channel Timer/PWM module  
NXP reserves the right to change the production detail specifications as may be  
required to permit improvements in the design of its products.  

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