Datasheet > JZ48F000BBY

JZ48F000BBY

更新时间： 2024-11-07 03:11:35

品牌	Logo	应用领域
英特尔 - INTEL		存储无线
页数	文件大小	规格书
106页	1700K
描述
StrataFlash Wireless Memory

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JZ48F000BBY 数据手册

Intel StrataFlash® Wireless Memory

(L18)

28F640L18, 28F128L18, 28F256L18

Datasheet

Product Features

■ High performance Read-While-Write/Erase

— 85 ns initial access

■ Security

— OTP space:

• 64 unique factory device identifier bits

• 64 user-programmable OTP bits

• Additional 2048 user-programmable OTP bits

— 54 MHz with zero wait state, 14 ns clock-to-

data output synchronous-burst mode

— 25 ns asynchronous-page mode

— 4-, 8-, 16-, and continuous-word burst mode

— Burst suspend

— Programmable WAIT configuration

— Buffered Enhanced Factory Programming

(BEFP) at 5 µs/byte (Typ)

— Absolute write protection: V = GND

— Power-transition erase/program lockout

— Individual zero-latency block locking

— Individual block lock-down

■ Software

— 1.8 V low-power buffered programming at

— 20 µs (Typ) program suspend

— 20 µs (Typ) erase suspend

7 µs/byte (Typ)

■ Architecture

— Intel® Flash Data Integrator optimized

— Basic Command Set (BCS) and Extended

Command Set (ECS) compatible

— Asymmetrically-blocked architecture

— Multiple 8-Mbit partitions: 64-Mbit and 128-

Mbit devices

— Common Flash Interface (CFI) capable

— Multiple 16-Mbit partitions: 256-Mbit devices

— Four 16-Kword parameter blocks: top or

bottom configurations

■ Quality and Reliability

— Expanded temperature: –25° C to +85° C

— Minimum 100,000 erase cycles per block

— ETOX™ VIII process technology (0.13 µm)

■ Density and Packaging

— 64-Kword main blocks

— Dual-operation: Read-While-Write (RWW) or

Read-While-Erase (RWE)

— 64-, 128-, and 256-Mbit density in VF BGA

packages

— 128/0 and 256/0 density in SCSP

— 16-bit wide data bus

— Status Register for partition and device status

■ Power

— V (core) = 1.7 V - 2.0 V

— V

(I/O) = 1.35 V - 2.0 V, 1.7 V - 2.0 V

CCQ

— Standby current: 30 µA (Typ) for 256-Mbit

— 4-Word synchronous read current: 15 mA (Typ)

at 54 MHz

— Automatic Power Savings mode

The Intel StrataFlash^®wireless memory (L18) device is the latest generation of Intel

StrataFlash^®memory devices featuring flexible, multiple-partition, dual operation. It provides

high performance synchronous-burst read mode and asynchronous read mode using 1.8 V low-

voltage, multi-level cell (MLC) technology.

The multiple-partition architecture enables background programming or erasing to occur in one

partition while code execution or data reads take place in another partition. This dual-operation

architecture also allows a system to interleave code operations while program and erase

operations take place in the background. The 8-Mbit or 16-Mbit partitions allow system

designers to choose the size of the code and data segments. The L18 wireless memory device is

manufactured using Intel 0.13 µm ETOX™ VIII process technology. It is available in industry-

standard chip scale packaging.

Order Number: 251902, Revision: 009

April 2005

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与JZ48F000BBY相关器件

型号	品牌	获取价格	描述	数据表
JZ48F000BBZ	INTEL	获取价格	StrataFlash Wireless Memory
JZ48F000BTY	INTEL	获取价格	StrataFlash Wireless Memory
JZ48F000BTZ	INTEL	获取价格	StrataFlash Wireless Memory
JZ48F000QBY	INTEL	获取价格	StrataFlash Wireless Memory
JZ48F000QBZ	INTEL	获取价格	StrataFlash Wireless Memory
JZ48F000QTY	INTEL	获取价格	StrataFlash Wireless Memory
JZ48F000QTZ	INTEL	获取价格	StrataFlash Wireless Memory
JZ48F0L0BBY	INTEL	获取价格	StrataFlash Wireless Memory
JZ48F0L0BBZ	INTEL	获取价格	StrataFlash Wireless Memory
JZ48F0L0BTY	INTEL	获取价格	StrataFlash Wireless Memory

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