Datasheet > JS28F00AP33EFA

JS28F00AP33EFA

更新时间： 2022-02-26 11:03:21

品牌	Logo	应用领域
镁光 - MICRON		/
页数	文件大小	规格书
92页	987K
描述
Micron Parallel NOR Flash Embedded Memory (P33-65nm)

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JS28F00AP33EFA 数据手册

512Mb, 1Gb, 2Gb: P33-65nm

Features

Micron Parallel NOR Flash Embedded

Memory (P33-65nm)

JS28F512P33BFD, JS28F512P33TFA, JS28F512P33EFA

PC28F512P33BFD, PC28F512P33TFA, PC28F512P33EFA

JS28F00AP33BFA, JS28F00AP33TFA, JS28F00AP33EFA

PC28F00AP33BFA, PC28F00AP33TFA, PC28F00AP33EFA,

PC28F00BP33EFA

• Security

Features

• High performance

– One-time programmable register: 64 OTP bits,

programmed with unique information from Mi-

cron; 2112 OTP bits available for customer pro-

gramming

• Easy BGA package features

– 95ns initial access for 512Mb, 1Gb Easy BGA

– 100ns initial access for 2Gb Easy BGA

– 25ns 16-word asychronous page read mode

– 52 MHz (Easy BGA) with zero WAIT states and

17ns clock-to-data output synchronous burst

read mode

– 4-, 8-, 16-, and continuous word options for burst

mode

• TSOP package features

– Absolute write protection: V_PP= V_SS

– Power-transition erase/program lockout

– Individual zero-latency block locking

– Individual block lock-down

– Password access

• Software

– 25μs (TYP) program suspend

– 25μs (TYP) erase suspend

– 105ns initial access for 512Mb, 1Gb TSOP

• Both Easy BGA and TSOP package features

– Buffered enhanced factory programming (BEFP)

at 2 MB/s (TYP) using a 512-word buffer

– 3.0V buffered programming at 1.46 MB/s (TYP)

using a 512-word buffer

– Flash Data Integrator optimized

– Basic command set and extended function Inter-

face (EFI) command set compatible

– Common flash interface

• Density and Packaging

– 56-lead TSOP package (512Mb, 1Gb)

– 64-ball Easy BGA package (512Mb, 1Gb, 2Gb)

– 16-bit wide data bus

• Quality and reliabilty

– JESD47 compliant

• Architecture

– MLC: highest density at lowest cost

– Symmetrically blocked architecture (512Mb, 1Gb,

2Gb)

– Asymmetrically blocked architecture (512Mb,

1Gb); four 32KB parameter blocks: top or bottom

configuration

– Operating temperature: –40°C to +85°C

– Minimum 100,000 ERASE cycles per block

– 65nm process technology

– 128KB main blocks

– Blank check to verify an erased block

• Voltage and power

– V_CC(core) voltage: 2.3–3.6V

– V_CCQ(I/O) voltage: 2.3–3.6V

– Standy current: 70µA (TYP) for 512Mb; 75µA

(TYP) for 1Gb

– 52 MHz continuous synchronous read current:

21mA (TYP), 24mA (MAX)

PDF: 09005aef845667b8

p33_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. C 12/13 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Products and specifications discussed herein are subject to change by Micron without notice.

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与JS28F00AP33EFA相关器件

型号	品牌	描述	获取价格	数据表
JS28F00AP33TFA	MICRON	Micron Parallel NOR Flash Embedded Memory (P33-65nm)	获取价格
JS28F064M29EWBA	MICRON	Anticipating electrostatic discharge (ESD) technology roadmap trends with ESD control hard	获取价格
JS28F064M29EWHA	MICRON	Anticipating electrostatic discharge (ESD) technology roadmap trends with ESD control hard	获取价格
JS28F064M29EWLA	MICRON	Anticipating electrostatic discharge (ESD) technology roadmap trends with ESD control hard	获取价格
JS28F064M29EWLB	MICRON	(x8/x16), 3V, Single Bit Per Cell, Page Read, Parallel NOR Flash Memory	获取价格
JS28F064M29EWTA	MICRON	Anticipating electrostatic discharge (ESD) technology roadmap trends with ESD control hard	获取价格

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