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JS28F00AP30TF PDF预览

JS28F00AP30TF

更新时间： 2024-01-15 15:17:50
品牌 Logo 应用领域
镁光 - MICRON 闪存存储内存集成电路光电二极管
页数 文件大小 规格书
92页 1225K
描述
Micron Parallel NOR Flash Embedded Memory (P30-65nm)

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JS28F00AP30TF 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：TSSOP, TSSOP56,.8,20Reach Compliance Code：unknown
风险等级：5.79最长访问时间：110 ns
启动块：TOP命令用户界面：YES
通用闪存接口：YES数据轮询：NO
JESD-30 代码：R-PDSO-G56内存密度：1073741824 bit
内存集成电路类型：FLASH内存宽度：16
部门数/规模：4,1023端子数量：56
字数：67108864 words字数代码：64000000
最高工作温度：85 °C最低工作温度：-40 °C
组织：64MX16封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP56,.8,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
页面大小：16 words并行/串行：PARALLEL
电源：1.8,1.8/3.3 V认证状态：Not Qualified
部门规模：16K,64K最大待机电流：0.00024 A
子类别：Flash Memories最大压摆率：0.031 mA
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
切换位：NO类型：NOR TYPE
Base Number Matches：1

JS28F00AP30TF 数据手册

 浏览型号JS28F00AP30TF的Datasheet PDF文件第2页浏览型号JS28F00AP30TF的Datasheet PDF文件第3页浏览型号JS28F00AP30TF的Datasheet PDF文件第4页浏览型号JS28F00AP30TF的Datasheet PDF文件第5页浏览型号JS28F00AP30TF的Datasheet PDF文件第6页浏览型号JS28F00AP30TF的Datasheet PDF文件第7页 
512Mb, 1Gb, 2Gb: P30-65nm  
Features  
Micron Parallel NOR Flash Embedded  
Memory (P30-65nm)  
JS28F512P30BFx, JS28F512P30EFx, JS28F512P30TFx,  
PC28F512P30BFx, PC28F512P30EFx, PC28F512P30TFx  
JS28F00AP30BFx, JS28F00AP30TFx, JS28F00AP30EFx,  
PC28F00AP30BFx, PC28F00AP30TFx, PC28F00AP30EFx,  
RC28F00AP30BFx, RC28F00AP30TFx, PC28F00BP30EFx  
• Security  
Features  
• High performance  
– One-time programmable register: 64 OTP bits,  
programmed with unique information from Mi-  
cron; 2112 OTP bits available for customer pro-  
gramming  
• Easy BGA package features  
– 100ns initial access for 512Mb, 1Gb Easy BGA  
– 105ns initial access for 2Gb Easy BGA  
– 25ns 16-word asychronous page read mode  
– 52 MHz (Easy BGA) with zero WAIT states and  
17ns clock-to-data output synchronous burst  
read mode  
– 4-, 8-, 16-, and continuous word options for burst  
mode  
• TSOP package features  
– Absolute write protection: VPP = VSS  
– Power-transition erase/program lockout  
– Individual zero-latency block locking  
– Individual block lock-down  
– Password access  
• Software  
– 25μs (TYP) program suspend  
– 25μs (TYP) erase suspend  
– 110ns initial access for 512Mb, 1Gb TSOP  
• Both Easy BGA and TSOP package features  
– Buffered enhanced factory programming (BEFP)  
at 2 MB/s (TYP) using a 512-word buffer  
– 1.8V buffered programming at 1.46 MB/s (TYP)  
using a 512-word buffer  
– Flash Data Integrator optimized  
– Basic command set and extended function Inter-  
face (EFI) command set compatible  
– Common flash interface  
• Density and Packaging  
– 56-lead TSOP package (512Mb, 1Gb)  
– 64-ball Easy BGA package (512Mb, 1Gb, 2Gb)  
– 16-bit wide data bus  
• Quality and reliabilty  
– JESD47 compliant  
• Architecture  
– MLC: highest density at lowest cost  
– Symmetrically blocked architecture (512Mb, 1Gb,  
2Gb)  
– Asymmetrically blocked architecture (512Mb,  
1Gb); four 32KB parameter blocks: top or bottom  
configuration  
– Operating temperature: –40°C to +85°C  
– Minimum 100,000 ERASE cycles per block  
– 65nm process technology  
– 128KB main blocks  
– Blank check to verify an erased block  
• Voltage and power  
– VCC (core) voltage: 1.7–2.0V  
– VCCQ (I/O) voltage: 1.7–3.6V  
– Standy current: 70µA (TYP) for 512Mb; 75µA  
(TYP) for 1Gb  
– 52 MHz continuous synchronous read current:  
21mA (TYP), 24mA (MAX)  
PDF: 09005aef845667b3  
p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
1
© 2013 Micron Technology, Inc. All rights reserved.  
Products and specifications discussed herein are subject to change by Micron without notice.  
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