Datasheet > JMTD2N7002KS

JMTD2N7002KS

更新时间： 2024-11-24 14:55:27

品牌	Logo	应用领域
捷捷微 - JJM		/
页数	文件大小	规格书
7页	309K
描述
中压 N-ch (40V ~ 400V)

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中文翻译

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数据手册

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JMTD2N7002KS 数据手册

JMTD2N7002KS

Description

JMT N-channel MOSFET

Features

Application

 V_DS=60V, I_D=0.2A

 Battery Operated Systems

 Direct logic-level Interface:

TTL/CMOS

R_DS(ON)<2.2Ω @ VGS = 10V

R_DS(ON)<2.8Ω @ VGS = 5V

 Advanced Trench Technology

 Excellent R_DS(ON)and Low Gate Charge

 Lead free product is acquired

 ESD Protected: 2KV

 Solid-State Relays

DFN1006-3L

Marking and pin Assignment

Schematic diagram

Package Marking and Ordering Information

Reel

(PCS)

Per Carton

Device Marking

Device

OUTLINE

Device Package

Reel Size

(PCS)

JMTD2N7002KS

TAPING

DFN1006-3L

7inch

10000

400000

Absolute Maximum Ratings (T_A=25℃ unless otherwise specified)

Symbol

Parameter

Drain-Source Voltage

Max.

Units

V_DSS

V_GSS

±20

Gate-Source Voltage

T_A= 25℃

0.2

I_D

Continuous Drain Current

T_A= 100℃

0.13

I_DM

P_D

Pulsed Drain Current ^note1

Power Dissipation

0.8

T_A= 25℃

0.15

R_θJA

Thermal Resistance, Junction to Ambient

833

℃/W

℃

T_J, T_STGOperating and Storage Temperature Range

-55 to +150

JieJie Microelectronics CO. , Ltd

Preliminary Version :1.0

- 1 -

12 3 4 5 6 7

中文翻译

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