JMPK2N65G1
Description
JMP N-channel Enhancement Mode Power MOSFET
Features
Application
650V, 2A
Load Switch
PWM Application
RDS(ON) < 5.5Ω @ VGS = 10V
Fast Switching
Power management
Improved dv/dt Capability
100% UIS TESTED!
100% ΔVds TESTED!
TO-252-4R (DPAK) top view
Marking and pin Assignment
Schematic Diagram
Package Marking and Ordering Information
Reel
Size
Reel
(PCS)
Per Carton
(PCS)
Device Marking
Device
OUTLINE
Device Package
JMPK2N65G1
JMPK2N65G1
TAPING
TO-252-4R
13inch
2500
25000
Absolute Maximum Ratings (TC=25℃ unless otherwise specified)
Symbol
VDSS
Parameter
Drain-Source Voltage
Max.
Units
V
650
VGSS
Gate-Source Voltage
±30
V
TC = 25℃
2
A
ID
Continuous Drain Current
Pulsed Drain Current note1
TC = 100℃
1.3
A
IDM
EAS
PD
8
31
A
Single Pulsed Avalanche Energy note2
mJ
W
Power Dissipation
TC = 25℃
35
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
3.6
℃/W
℃/W
℃
62.5
TJ, TSTG Operating and Storage Temperature Range
-55 to +150
JieJie Microelectronics CO. , Ltd
Version :1.0
- 1 -