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JM38510/65760BRA PDF预览

JM38510/65760BRA

更新时间： 2024-01-12 17:36:24
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
14页 918K
描述
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

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JM38510/65760BRA 技术参数

生命周期：Active零件包装代码：DIP
包装说明：DIP,针数：20
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
Factory Lead Time：6 weeks风险等级：5.17
Is Samacsys：N其他特性：WITH DUAL OUTPUT ENABLE
控制类型：ENABLE LOW计数方向：UNIDIRECTIONAL
系列：HCTJESD-30 代码：R-GDIP-T20
长度：24.2 mm负载电容（CL）：150 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.006 A
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：INVERTED
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
包装方法：TUBE峰值回流温度（摄氏度）：NOT SPECIFIED
最大电源电流（ICC）：0.08 mAProp。Delay @ Nom-Sup：30 ns
传播延迟（tpd）：45 ns认证状态：Not Qualified
筛选级别：MIL-M-38510 Class B座面最大高度：5.08 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：NO
技术：CMOS温度等级：MILITARY
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A宽度：6.92 mm
Base Number Matches：1

JM38510/65760BRA 数据手册

 浏览型号JM38510/65760BRA的Datasheet PDF文件第2页浏览型号JM38510/65760BRA的Datasheet PDF文件第3页浏览型号JM38510/65760BRA的Datasheet PDF文件第4页浏览型号JM38510/65760BRA的Datasheet PDF文件第5页浏览型号JM38510/65760BRA的Datasheet PDF文件第6页浏览型号JM38510/65760BRA的Datasheet PDF文件第7页 
SN54HCT540, SN74HCT540  
OCTAL BUFFERS AND LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCLS008C – MARCH 1984 – REVISED MARCH 2003  
SN54HCT540 . . . J PACKAGE  
SN74HCT540 . . . DW OR N PACKAGE  
(TOP VIEW)  
Operating Voltage Range of 4.5 V to 5.5 V  
Low Power Consumption, 80-µA Max I  
CC  
Typical t = 12 ns  
pd  
OE1  
A1  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
±6-mA Output Drive at 5 V  
19 OE2  
18 Y1  
17 Y2  
Low Input Current of 1 µA Max  
Inputs Are TTL-Voltage Compatible  
A2  
A3  
High-Current 3-State Outputs Interface  
Directly With System Bus or Can Drive Up  
To 15 LSTTL Loads  
16  
15  
14  
13  
12  
11  
A4  
Y3  
Y4  
Y5  
Y6  
Y7  
Y8  
A5  
A6  
Data Flow-Through Pinout (All Inputs on  
Opposite Side From Outputs)  
A7  
A8  
GND  
description/ordering information  
These octal buffers and line drivers are designed to have the performance of the ’HCT240 devices and a pinout  
with inputs and outputs on opposite sides of the package. This arrangement greatly facilitates printed circuit  
board layout.  
The 3-state control gate is a 2-input NOR. If either output-enable (OE1 or OE2) input is high, all eight outputs  
are in the high-impedance state. The ’HCT540 devices provide inverted data at the outputs.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP – N  
SOIC – DW  
CDIP – J  
Tube  
SN74HCT540N  
SN74HCT540N  
–40°C to 85°C  
–55°C to 125°C  
Tube  
SN74HCT540DW  
SN74HCT540DWR  
SNJ54HCT540J  
HCT540  
Tape and reel  
Tube  
SNJ54HCT540J  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each buffer/driver)  
INPUTS  
OUTPUT  
Y
OE1  
L
OE2  
L
A
L
H
L
L
L
H
X
X
H
X
Z
Z
X
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...14

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